Patent Assignment
Reel/Frame 039482/0015
Order...Authorizing the Sale of All or Substantially All of the Assets of the Debtors Free and Clear of All Liens, Encumbrances, and Interests.
Recorded: 2016-07-26
Pages: 10
Assignor
MORGAN STANLEY & CO., INCORPORATED
Executed: 2009-05-08
Assignee
SILICON GRAPHICS, INC.
1140 EAST ARQUES AVE, SUNNYVALE, CALIFORNIA, 94085
Covered Properties
(166)
System for Multiprocessor Communication
Patent:
5,526,487 →
Application:
07/308,401 →
Cluster Architecture for a Highly Parallel Scalar/Vector Mulriprocessor System
Patent:
5,197,130 →
Application:
07/459,083 →
System and Method for Controlling a Highly Parallel Multiprocessor Using an Anarchy Based Scheduler for Parallel Execution Thread Scheduling
Patent:
5,179,702 →
Application:
07/537,466 →
Method and Apparatus for Memory Access in a Matrix Processor Computer
Patent:
6,282,583 →
Application:
07/710,146 →
Fiber Optic Channel Extender Interface Method and Apparatus
Patent:
5,390,041 →
Application:
07/788,496 →
Method and Apparatus for a Unified Parallel Processing Architecture
Patent:
5,428,803 →
Application:
07/912,964 →
Method for Clocking Functional Units in One Cycle by Using a Single Clock for Routing Clock Inputs to Initiate Receive Operations Prior to Transmit Operations
Patent:
5,495,596 →
Application:
07/923,086 →
Direction Order Priority Routing of Packets Between Nodes in a Networked System
Patent:
5,533,198 →
Application:
07/983,979 →
Optical Clock Distribution System
Patent:
5,537,498 →
Application:
08/027,049 →
Method and Apparatus for Locking Shared Memory Locations in Multiprocessing Systems
Patent:
5,535,365 →
Application:
08/141,259 →
System and Method of Addressing Distributed Memory Within a Massively Parallel Processing System
Patent:
5,765,181 →
Application:
08/165,118 →
Barrier Synchronization for Distributed Memory Massively Parallel Processing Systems
Patent:
5,434,995 →
Application:
08/165,265 →
System for Allocating Messages Between Virtual Channels to Avoid Deadlock and to Optimize the Amount of Message Traffic on Each Type of Virtual Channel
Patent:
5,583,990 →
Application:
08/165,266 →
Recursive Address Centrifuge for Distributed Memory Massively Parallel Processing Systems
Patent:
5,696,922 →
Application:
08/165,388 →
Repetitive Signal Detector for Preventing Thermal Runaway
Patent:
5,418,481 →
Application:
08/165,747 →
Virtual to Logical to Physical Address Translation for Distributed Memory Massively Parallel Processing Systems
Patent:
5,784,706 →
Application:
08/165,814 →
Method of Managing Distributed Memory Within a Massively Parallel Processing System
Patent:
5,566,321 →
Application:
08/166,293 →
Messaging Facility with Hardware Tail Pointer and Software Implemented Head Pointer Message Queue for Distributed Memory Massively Parallel Processing System
Patent:
5,581,705 →
Application:
08/166,443 →
Method for the Dynamic Allocation of Page Sizes in Virtual Memory
Patent:
5,802,341 →
Application:
08/166,451 →
Disk Drive Bracket
Patent:
5,564,804 →
Application:
08/168,166 →
Vector Shift Functional Unit for Successively Shifting Operands Stored in a Vector Register by Corresponding Shift Counts Stored in Another Vector Register
Patent:
5,481,746 →
Application:
08/218,997 →
Interleaved Memory Access System Having Variable-Sized Segments Logical Address Spaces and Means for Dividing/Mapping Physical Address into Higher and Lower Order Addresses
Patent:
5,561,784 →
Application:
08/268,660 →
Extendible Clock Mechanism
Patent:
5,625,831 →
Application:
08/331,730 →
Stream Buffers for High-Performance Computer Memory Systems
Patent:
5,761,706 →
Application:
08/333,133 →
Apparatus and Method for Testing Using Clocked Test Access Port Controller for Level Sensitive Scan Designs
Patent:
6,173,428 →
Application:
08/340,238 →
Associative Scalar Data Cache with Write-Through Capabilities for a Vector Processor
Patent:
5,717,895 →
Application:
08/348,056 →
Method and Apparatus for Accessing Global Registers in a Multiprocessor System
Patent:
5,524,255 →
Application:
08/379,123 →
Boundary Scan Testing Using Clocked Signal
Patent:
5,487,074 →
Application:
08/406,571 →
Communication Protocol for Transferring Information Across a #S Serial Communication Link
Patent:
5,592,487 →
Application:
08/407,808 →
Adaptive Routing Mechanism for Torus Interconnection Network
Patent:
5,701,416 →
Application:
08/421,566 →
System for Randomly Modifying Virtual Channel Allocation and Accepting the Random Modification Based on the Cost Function
Patent:
5,659,796 →
Application:
08/422,072 →
Distributed Global Clock System
Patent:
5,822,381 →
Application:
08/435,455 →
Directory-Based Coherence Protocol Allowing Efficient Dropping of Clean-Exclusive Data
Patent:
5,680,576 →
Application:
08/435,460 →
Barrier and Eureka Synchronization Architecture for Multiprocessors
Patent:
5,721,921 →
Application:
08/450,251 →
Heatsink and Method of Forming a Heatsink
Patent:
5,829,512 →
Application:
08/520,408 →
Configuring of Networked System to Permit Replacement of Failed Nodes and Selection of Alternate Paths
Patent:
5,689,646 →
Application:
08/541,803 →
Nigh Performance Sinusoidal Heat Sink for Heat Removal from Electronic Equipment
Patent:
5,709,263 →
Application:
08/551,070 →
High Performance Spiral Heat Sink
Patent:
5,661,638 →
Application:
08/552,801 →
Readily Removable Heat Sink Assembly
Patent:
5,662,163 →
Application:
08/564,404 →
Scan Chain for Shiting the State of a Processor into Memory at a Specified Point During System Operation for Testing Purposes
Patent:
5,671,235 →
Application:
08/567,082 →
Single Connector Attachment Drive Sled Assembly Having Light Pipe Coupled to a Rail
Patent:
5,654,873 →
Application:
08/592,890 →
Transparent Relocation of Real Memory Addresses in the Main Memory of a Data Processor
Patent:
5,765,198 →
Application:
08/595,528 →
Daughter Card Assembly
Patent:
5,761,043 →
Application:
08/604,839 →
Air or Liquid Cooled Computer Module Cold Plate
Patent:
6,305,463 →
Application:
08/604,841 →
Cooling Approach for High Power Integrated Circuits Mounted on Printed Circuit Boards
Patent:
5,768,104 →
Application:
08/605,355 →
Bga Land Pattern
Patent:
6,091,155 →
Application:
08/606,291 →
System and Method to Reduce Jitter in Digital Delay-Locked Loops
Patent:
5,790,612 →
Application:
08/609,068 →
Procedure and System for Placement Optimization of Cells Within Circuit Blocks by Optimizing Placement of Input/Output Ports Within an Integrated Circuit Design
Patent:
5,757,658 →
Application:
08/611,785 →
Massively Parallel Processing System Using Two Data Paths: One Connecting Router Circuit to the Interconnect Network and the Other Connecting Router Circuit to I/O Controller
Patent:
5,864,738 →
Application:
08/614,859 →
System and Method for Fault-Tolerant Transmission of Data Within a Dual Ring Network
Patent:
6,233,704 →
Application:
08/614,860 →
Using External Registers to Extend Memory Reference Capabilities of a Microprocessor
Patent:
5,835,925 →
Application:
08/615,671 →
Messaging in Distributed Memory Multiprocessing System Having Shell Circuitry for Atomic Control of Message Storage Queue's Tail Pointer Structure in Local Memory
Patent:
5,841,973 →
Application:
08/615,694 →
Adaptive Congestion Control Mechanism for Modular Computer Networks
Patent:
5,748,900 →
Application:
08/615,700 →
Heat Sink with Integral Attachment Mechanism
Patent:
5,735,340 →
Application:
08/649,769 →
Raid-5 Parity Generation and Data Reconstruction
Patent:
5,805,788 →
Application:
08/650,336 →
Method and Apparatus for Adjusting the Power Supply Voltage Provided to a Microprocessor
Patent:
5,694,028 →
Application:
08/650,337 →
A System for Arbitrating Packetized Data from the Network to the Peripheral Resources and Prioritizing the Dispatching of Packets Onto the Network
Patent:
5,761,534 →
Application:
08/650,630 →
A Raid System Using I/O Buffer Segment to Temporary Store Striped and Parity Data and Connecting All Disk Drives via a Single Time Multiplexed Network
Patent:
5,862,313 →
Application:
08/650,632 →
Networked Multiprocessor System with Global Distributed Memory and Block Transfer Engine
Patent:
5,797,035 →
Application:
08/661,908 →
Multiprocessor Computer System with Interleaved Processing Element Nodes
Patent:
5,737,628 →
Application:
08/662,868 →
Method and Apparatus for Removing Power-of-Two Restrictions on Distributed Addressing
Patent:
5,900,023 →
Application:
08/673,436 →
Apparatus and Method for Determining the Speed of a Semiconductor Chip
Patent:
5,818,250 →
Application:
08/675,849 →
Bulkhead Gasket Assembly
Patent:
5,770,822 →
Application:
08/697,073 →
Direct Memory Access Apparatus for Transferring a Block of Data Having Discontinuous Addresses Using an Address Calculating Circuit
Patent:
6,108,722 →
Application:
08/713,602 →
Resilient Panel for Housing a Machine
Patent:
5,897,180 →
Application:
08/716,928 →
Instruction Methods for Performing Data Formatting While Moving Data Between Memory and a Vector Register File
Patent:
5,812,147 →
Application:
08/716,972 →
Guaranteed Bandwidth Allocation Method in a Computer System for Input/Output Data Transfers
Patent:
5,784,569 →
Application:
08/717,581 →
Cable Management System for a Computer
Patent:
5,957,556 →
Application:
08/717,988 →
Raid System with Fibre Channel Arbitrated Loop
Patent:
5,812,754 →
Application:
08/718,743 →
Adaptive Frequency Synthesizer with Synchronization
Patent:
6,067,411 →
Application:
08/718,765 →
Low-Latency Real-Time Dispatching in General Purpose Multiprocessor Systems
Patent:
5,928,322 →
Application:
08/752,925 →
Apparatus and Method for Page Migration in a Non-Uniform Memory Access (Numa) System
Patent:
5,727,150 →
Application:
08/766,363 →
Programmable Packer and Unpacker with Ditherer
Patent:
6,065,084 →
Application:
08/775,834 →
High Bandwidth Pci to Packet Switched Router Bridge Having Minimized Memory Latency
Patent:
5,915,104 →
Application:
08/780,781 →
Circuit for Filtering a Power Supply for Noise Sensitive Devices
Patent:
5,825,238 →
Application:
08/788,369 →
Power Switch Plunger Mechanism
Patent:
5,817,997 →
Application:
08/794,195 →
Method and System for Simultaneous High Bandwidth Input Output
Patent:
5,991,824 →
Application:
08/796,129 →
Rotary Latch Assembly for a Computer Housing
Patent:
5,826,922 →
Application:
08/815,636 →
Recursive Address Centrifuge for Distributed Memory Massively Parallel Processing Systems
Patent:
6,119,198 →
Application:
08/889,251 →
Integral Actuator for a Printed Circuit Board
Patent:
5,967,825 →
Application:
08/911,909 →
Precise Detection of Errors Using Hardware Watchpoint Mechanism
Patent:
5,987,626 →
Application:
08/920,177 →
Adaptive Bandwidth Sharing
Patent:
6,205,119 →
Application:
08/931,565 →
Method, System, and Computer Program Product for Allocating Physical Memory in a Distributed Shared Memory Network
Patent:
6,249,802 →
Application:
08/933,829 →
Demateable, Compliant, Area Array Interconnect
Patent:
6,142,789 →
Application:
08/934,973 →
Adaptive Congestion Control Mechanism for Modular Computer Networks
Patent:
5,958,017 →
Application:
08/935,667 →
System Method and Computer Program Product for Dynamically Sizing Hash Tables
Patent:
5,960,434 →
Application:
08/938,672 →
Porous Metal Heat Sink
Patent:
6,018,459 →
Application:
08/971,179 →
Multiprocessor Computer System and Method for Maintaining Cache Coherence Utilizing a Multi-Demensional Cache Coherence Directory Structure
Patent:
6,633,958 →
Application:
08/971,184 →
Spacial Derivative Bus Encoder and Decoder
Patent:
6,480,548 →
Application:
08/971,185 →
Router Table Lookup Mechanism
Patent:
5,970,232 →
Application:
08/971,587 →
Hybrid Hypercube/Torus Architecture
Patent:
6,230,252 →
Application:
08/971,588 →
Virtual Channel Assignment in Large Torus Systems
Patent:
6,101,181 →
Application:
08/971,591 →
Serialized Race-Free Virtual Barrier Network
Patent:
6,085,303 →
Application:
08/972,010 →
Improved Hot- Plug Power Supply for High- Availability Computer Systems
Patent:
6,044,424 →
Application:
08/985,562 →
Interleaving Memory in Distributed Vector Architecture Multiprocessor System
Patent:
5,913,069 →
Application:
08/987,948 →
Distributed Vector Architecture
Patent:
5,946,496 →
Application:
08/988,524 →
Message Buffering for a Computer-Based Network
Patent:
6,256,677 →
Application:
08/991,233 →
Modular Card Cage
Patent:
6,171,120 →
Application:
09/005,219 →
Method of Handling Arbitrary Size Message Queues in Which a Message Is Written into an Aligned Block of External Registers Within a Plurality of External Registers
Patent:
6,029,212 →
Application:
09/006,449 →
The Fabrication of Test Logic for Level Sensitive Scan on a Circuit
Patent:
6,092,226 →
Application:
09/021,651 →
Diamond-Based Transformers and Power Convertors
Patent:
6,181,231 →
Application:
09/055,554 →
Large Area, Multi-Device Heat Pipe for Stacked Mcm-Based Systems
Patent:
6,055,157 →
Application:
09/056,037 →
Quantum Acceleration of Conventional Non-Quantum Computers
Patent:
6,081,882 →
Application:
09/057,701 →
Memory System with Multiple Addressing and Control Busses
Patent:
5,870,325 →
Application:
09/060,451 →
Method and System for Efficient Context Switching in a Computer Graphics System
Patent:
6,208,361 →
Application:
09/097,601 →
Eigen-Mode Encoding of Signals in a Data Group
Patent:
6,226,330 →
Application:
09/118,158 →
Cooling Cap Method and Apparatus for Tab Packaged Integrated Circuit
Patent:
5,963,428 →
Application:
09/136,908 →
Media Coprocessor with Graphics Video and Audio Tasks Partitioned by Time Division Multiplexing
Patent:
6,275,239 →
Application:
09/137,017 →
System and Method for Fast Barrier Synchronization
Patent:
6,216,174 →
Application:
09/162,673 →
Advanced Boot Sequence for an X86 Computer System That Maintains Expansion Card Device Compatibility
Patent:
6,128,731 →
Application:
09/176,696 →
Memory System with Multiple Addressing and Control Busses
Patent:
6,078,515 →
Application:
09/196,624 →
High Performance Gas Cooling System and Method
Patent:
6,167,947 →
Application:
09/215,531 →
Memory System with Switching for Data Isolation
Patent:
6,115,278 →
Application:
09/247,256 →
Method for Efficient Translation of Memory Addresses in Computer Systems
Patent:
6,223,270 →
Application:
09/294,830 →
Noise Estimation for Coupled Rc Interconnects in Deep Submicron Integrated Circuits
Patent:
6,732,065 →
Application:
09/301,863 →
Door Assembly for a Computer
Patent:
6,132,019 →
Application:
09/372,660 →
Memory System with Switching for Data Isolation
Patent:
6,215,686 →
Application:
09/384,471 →
Translation of Pci Level Interrupts into Packet Based Messages for Edge Event Drive Microprocessors
Patent:
6,604,161 →
Application:
09/408,084 →
Modular Air Moving System and Method.
Patent:
6,406,257 →
Application:
09/408,769 →
System and Method for Cooling Electronicomponents
Patent:
6,366,461 →
Application:
09/408,772 →
Printed Circuit Board Carrier Insertion/Extraction Assembly
Patent:
6,193,532 →
Application:
09/408,969 →
Diagnostic System and Method for a Highly Scalable Computing System
Patent:
6,601,183 →
Application:
09/409,438 →
Abstract Verification Environment
Patent:
6,856,950 →
Application:
09/418,706 →
Programmable Differential Delay Circuit with Fine Delay Adjustment
Patent:
6,417,713 →
Application:
09/475,466 →
Carrier for Computer Peripheral Device
Patent:
6,381,139 →
Application:
09/475,469 →
System and Method for Adaptively Deskewing Parallel Data Signals Relative to a Clock
Patent:
7,031,420 →
Application:
09/476,678 →
Metered force single point heatsink attach mechanism
Patent:
6,169,659 →
Application:
09/498,939 →
System and Method for a Hierarchical System Management Architecture of a Highly Scalable Computing System
Patent:
6,845,410 →
Application:
09/522,695 →
Panel Gasket
Patent:
6,483,024 →
Application:
09/608,378 →
System and Method for a Hierarchical System Management Architecture of a Highly Scalable Computing System
Patent:
7,219,156 →
Application:
09/644,698 →
System for Communications Where First Priority Data Transfer Is Not Disturbed by Second Priority Data Transfer and Where Allocated Bandwidth Is Removed When Process Terminates Abnormally
Patent:
38,134 →
Application:
09/679,447 →
Transparent Distribution and Execution of Data in a Multiprocessor Environment
Remote Address Translation in a Multiprocessor System
Node Translation and Protection in a Clustered Multiprocessor System
Bus Speed Controller Using Switches
Programmable Differential Delay Circuit with Fine Delay Adjustment
Programmable Differential Delay Circuit with Fine Delay Adjustment
Spacial Derivative Bus Encoder and Decoder
System and Method for a Self-Calibrating Sense-Amplifier Strobe
Method and Rack for Exchanging Air with Modular Bricks in a Computer System
Printed Circuit Board Stiffener
Backshell Assembly
Electromagneric Interference Cable Backshell Assembly for High-Density Interconnect
Synchronization Circuits for the Distribution of Unique Data to Scattered Locations
Address Translation Using a Page Size Tag
System and Method for Encoding Page Size Information
Sub Rack Based Vertical Housing for Computer Systems
Memory Access Management in a Shared Memory Multi-Processor System
System and method for networked computer graphics
Application:
10/899,316 →
Publication:
US 2006/0026234
Method for Empirically Determining a Qualified Bandwidth of File Storage for a Shared Filed System
Node Synchronization for Multi-Processor Computer Systems
Liquid DIMM Cooler
Application:
11/121,975 →
Publication:
US 2006/0250772
Fault Tolerant Memory System
Hot Plug Control Apparatus and Method
System and Method for Reducing Back Flow
System and Method for Adaptively Deskewing Parallel Data Signals Relative to a Clock
Housing for Deskside Computer
Patent:
393,249 →
Application:
29/060,131 →
Compact Computer Housing
Patent:
395,286 →
Application:
29/060,203 →
Compact Computer Housing
Patent:
396,698 →
Application:
29/065,316 →
Computer Housing
Patent:
417,203 →
Application:
29/096,304 →
Computer Housing
Patent:
431,242 →
Application:
29/097,545 →
Bezel for a Computer
Patent:
429,248 →
Application:
29/108,315 →
Radial Computer System
Patent:
436,950 →
Application:
29/113,555 →
Panel
Patent:
464,973 →
Application:
29/135,733 →
Panel
Patent:
464,054 →
Application:
29/135,803 →
Industrial Rack
Patent:
463,796 →
Application:
29/136,032 →
Related Assignments
(25)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Apr 18, 2014
From: SILICON GRAPHICS, INC.
To: SILICON GRAPHICS INTERNATIONAL, INC.
Reel/Frame 032714/0032 →
Merger
Apr 18, 2014
From: SGI INTERNATIONAL, INC.
To: SILICON GRAPHICS INTERNATIONAL CORP.
Reel/Frame 032714/0427 →
Change of Name
Apr 18, 2014
From: SILICON GRAPHICS INTERNATIONAL, INC.
To: SGI INTERNATIONAL, INC.
Reel/Frame 032714/0230 →
Assignment of Assignor's Interest
Apr 23, 2014
From: SCHIFFLEGER, ALAN J.; GUPTA, RAM K.; HSIUNG, CHRISTOPHER C.
To: CRAY RESEARCH, INC.
Reel/Frame 032741/0281 →
Change of Name
Jan 22, 2015
From: SILICON GRAPHICS INTERNATIONAL, INC.
To: SGI INTERNATIONAL, INC.
Reel/Frame 034804/0661 →
Merger
Jan 22, 2015
From: SGI INTERNATIONAL, INC.
To: SILICON GRAPHICS INTERNATIONAL CORP.
Reel/Frame 034804/0437 →
Assignment of Assignor's Interest
Jan 22, 2015
From: SILICON GRAPHICS, INC.
To: SILICON GRAPHICS INTERNATIONAL, INC.
Reel/Frame 034804/0446 →
Merger
Jan 28, 2015
From: CRAY RESEARCH, INC.
To: CRAY RESEARCH, L.L.C.
Reel/Frame 034837/0218 →
Security Interest
Mar 13, 2015
From: SILICON GRAPHICS INTERNATIONAL CORP.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035200/0722 →
Order. . .Authorizing the Sale of All or Substantially All of the Assets of the Debtors Free and Clear of All Liens, Encumbrances, and Interests.
Jul 25, 2016
From: FOOTHILL CAPITAL CORPORATION
To: SILICON GRAPHICS, INC.
Reel/Frame 039461/0522 →
Order...Authorizing the Sale of All or Substantially All of the Assets of the Debtors Free and Clear of All Liens, Encumbrances, and Interests.
Jul 26, 2016
From: FOOTHILL CAPITAL CORPORATION
To: SILICON GRAPHICS, INC.
Reel/Frame 039474/0606 →
Merger
Jul 26, 2016
From: CRAY RESEARCH, INC.
To: CRAY RESEARCH, L.L.C.
Reel/Frame 039474/0796 →
Order. . .Authorizing the Sale of All or Substantially All of the Assets of the Debtors Free and Clear of All Liens, Claims, Encumbrances, and Interests
Jul 27, 2016
From: U.S. BANK NATIONAL ASSOCIATION, AS TRUSTEE
To: SILICON GRAPHICS, INC
Reel/Frame 039484/0869 →
Assignment of Assignor's Interest
Aug 1, 2016
From: SILICON GRAPHICS, INC.
To: SILICON GRAPHICS INTERNATIONAL, INC.
Reel/Frame 039535/0349 →
Change of Name
Aug 1, 2016
From: SILICON GRAPHICS INTERNATIONAL, INC.
To: SGI INTERNATIONAL, INC.
Reel/Frame 039535/0525 →
Merger
Aug 1, 2016
From: SGI INTERNATIONAL, INC.
To: SILICON GRAPHICS INTERNATIONAL CORP.
Reel/Frame 039307/0778 →
Change of Name
Aug 9, 2016
From: SILICON GRAPHICS INTERNATIONAL, INC.
To: SGI INTERNATIONAL, INC.
Reel/Frame 039636/0809 →
Change of Name
Oct 21, 2016
From: SILICON GRAPHICS INTERNATIONAL, INC.
To: SGI INTERNATIONAL, INC.
Reel/Frame 040459/0157 →
Merger
Oct 21, 2016
From: SGI INTERNATIONAL, INC.
To: SILICON GRAPHICS INTERNATIONAL CORP.
Reel/Frame 040459/0518 →
Assignment of Assignor's Interest
Oct 21, 2016
From: CRAY RESEARCH, L.L.C.
To: SILICON GRAPHICS, INC.
Reel/Frame 040092/0651 →
Assignment of Assignor's Interest
Oct 21, 2016
From: SILICON GRAPHICS, INC
To: SILICON GRAPHICS INTERNATIONAL, INC.
Reel/Frame 040459/0026 →
Merger
Oct 21, 2016
From: CRAY RESEARCH, INC.
To: CRAY RESEARCH, L.L.C.
Reel/Frame 040464/0893 →
Assignment of Assignor's Interest
Oct 24, 2016
From: CHEN, STEVE S.; BEARD, DOUGLAS R; SPIX, GEORGE A; PRIEST, EDWARD C
To: SUPERCOMPUTER SYSTEMS LIMITED PARTNERSHIP
Reel/Frame 040104/0330 →
Assignment of Assignor's Interest
Oct 24, 2016
From: CHEN, STEVE S; SIMMONS, FREDERICK J; SPIX, GEORGE A; WILSON, JIMMIE R
To: SUPERCOMPUTER SYSTEMS LIMITED PARTNERSHIP
Reel/Frame 040104/0704 →
Release of Security Interest
Nov 2, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS AGENT
To: SILICON GRAPHICS INTERNATIONAL CORP.
Reel/Frame 040545/0362 →