System and method for optimizing computational density
View Patent ↗A system and method of designing a computer system having a plurality of processors. A computational density is selected for the computer system, wherein the computational density is expressed as a function of a desired computational power for a given volume. A number of processors is selected for used in the computer system and the desired computational power is allocated across the selected number of processors. One or more constraints are selected and a particular processor is designed or selected to meet the allocated processor computational power and the constraint.
1. A method of designing a computer system having a plurality of processors, the method comprising:
providing a plurality of component choices for each processor;
selecting a computational density for the computer system, wherein the computational density is expressed as a function of a desired computational power for a given volume;
selecting a number of processors to be used in the computer system;
allocating the desired computational power across the selected number of processors;
selecting a constraint; and
selecting a component choice from the plurality of component choices such that the allocated processor computational power and the constraint are met.
2. The method of claim 1 , wherein the constraint is power dissipation per unit volume.
3. The method of claim 1 , wherein the constraint is selected from a group including cost per unit volume and reliability.
4. The method of claim 1 , wherein the constraint is reliability across the computer system.
5. The method according to claim 1 , wherein the computational density is expressed in operations per second for a given volume.
6. The method according to claim 1 , wherein the computational density is expressed in performance on a performance benchmark for a given volume.
7. The method according to claim 1 , wherein selecting a number of processors includes selecting a method of interconnecting the processors.
8. An article comprising a computer readable medium having instructions thereon, wherein the instructions, when executed in a computer, create a system for executing the method of claim 1 .
9. The method according to claim 1 , wherein selecting a constraint includes selecting one or more constraints from a plurality of constraints including power dissipation, reliability and cost and allocating portions of the selected constraints across the selected number of processors.
10. The method according to claim 1 , wherein selecting a number of processors includes selecting a number of processor nodes, selecting a number of processors per node and selecting a method of interconnecting the processors.
11. A method of designing a computer system having a plurality of processors, the method comprising:
selecting maximum power dissipation for the computer system;
selecting a quantity of processors;
allocating a processor power budget to each processor as a function of the maximum power dissipation selected for the computer system;
allocating a processor computational power to each processor as a function of a desired computational density; and
designing the processor to meet the allocated processor computational power and the allocated processor power budget.
12. The method according to claim 11 , wherein the computational density is expressed in floating point operations per second for a given volume.
13. The method according to claim 11 , wherein the computational density is expressed in operations per second for a given volume.
14. The method according to claim 11 , wherein the computational density is expressed in performance on a performance benchmark for a given volume.
15. The method according to claim 11 , wherein selecting a number of processors to be used in the computer system includes selecting a method of interconnecting the processors.
16. The method according to claim 11 , wherein designing the processor includes simulating execution of an application program on a given processor design.
17. The method according to claim 11 , wherein designing the processor includes determining processor computational power and processor heat generation for the processor as a function of clock frequency.
18. The method according to claim 11 , wherein designing the processor includes determining processor computational power and processor heat generation for the processor as a function of processor voltage.
19. An article comprising a computer readable medium having instructions thereon, wherein the instructions, when executed in a computer, create a system for executing the method of claim 11 .
20. A method of designing a computer system having a plurality of processors, the method comprising:
selecting a computational density for the computer system;
selecting a quantity of processors;
allocating a processor computational power to each processor as a function of the computational density selected;
allocating a processor power budget to each processor as a function of a power budget for the computer system; and
selecting a processor design that meets the allocated processor computational power and the allocated processor power budget.
21. The method according to claim 20 , wherein the computational density is expressed in floating point operations per second for a given volume.
22. The method according to claim 20 , wherein the computational density is expressed in operations per second for a given volume.
23. The method according to claim 20 , wherein the computational density is expressed in performance on a performance benchmark for a given volume.
24. The method according to claim 20 , wherein selecting a quantity of processors includes selecting a method of interconnecting the processor nodes.
25. An article comprising a computer readable medium having instructions thereon, wherein the instructions, when executed in a computer, create a system for executing the method of claim 20 .
26. A method of designing a computer system having a plurality of processors, the method comprising:
a) selecting a computational density for the computer system;
b) selecting a quantity of processors;
c) allocating a processor computational power to each processor as a function of the computational density selected;
d) allocating a processor power budget to each processor as a function of a power budget for the computer system;
e) determining if an available processor approximates the allocated processor computational power and the allocated processor power budget; and
f) if no available processor meets the allocated processor computational power and the allocated processor power budget, selecting a different quantity of processors and repeating c-f.
27. The method according to claim 26 , wherein the computational density is expressed in floating point operations per second for a given volume.
28. The method according to claim 26 , wherein the computational density is expressed in operations per second for a given volume.
29. The method according to claim 26 , wherein the computational density is expressed in performance on a performance benchmark for a given volume.
30. The method according to claim 26 , wherein selecting a quantity of processors includes selecting a method of interconnecting the processor nodes.
31. An article comprising a computer readable medium having instructions thereon, wherein the instructions, when executed in a computer, create a system for executing the method of claim 26 .
32. A method of designing a computer system having a plurality of processors, the method comprising:
selecting a computational density for the computer system;
selecting a quantity of processors;
allocating a processor computational power to each processor as a function of the computational density selected;
allocating a processor power budget to each processor as a function of a power budget for the computer system; and
selecting a processor design from a plurality of processor designs, wherein each processor design has a processor computational power and a processor power output, wherein selecting a processor design includes choosing a processor design as a function of the allocated processor computational power and the allocated processor power budget.
33. The method according to claim 32 , wherein choosing a processor design as a function of the allocated processor computational power and the allocated processor power budget includes weighting a contribution of the allocated processor computational power more than a contribution of the allocated processor power budget.
34. The method according to claim 32 , wherein the computational density is expressed in floating point operations per second for a given volume.
35. The method according to claim 32 , wherein the computational density is expressed in operations per second for a given volume.
36. The method according to claim 32 , wherein the computational density is expressed in performance on a performance benchmark for a given volume.
37. The method according to claim 32 , wherein selecting a quantity of processor nodes includes selecting a method of interconnecting the processor nodes.
38. The method according to claim 32 , wherein the processor computational power and the processor power output vary with frequency and voltage and wherein selecting a processor design from a plurality of processor designs includes selecting an appropriate frequency and voltage for each processor design.
39. The method according to claim 32 , wherein the processor computational power and the processor power output vary with frequency and voltage and wherein selecting a processor design from a plurality of processor designs includes balancing frequency and voltage against processor power output for each processor design.
40. A computer design system, comprising:
nonvolatile memory for storing information for a plurality of different processors, wherein the information includes information on processor operation for each of the different processors;
means, connected to the nonvolatile memory, for selecting a computational density for a computer design;
means, connected to the nonvolatile memory, for selecting a number of processors to use in the computer design;
means, connected to the nonvolatile memory, for allocating a processor computational power across the selected number of processors;
means, connected to the nonvolatile memory, for allocating a processor power budget across the selected number of processors; and
means, connected to the nonvolatile memory, for selecting a processor from the plurality of different processors, wherein selecting includes determining the processor that provides an optimal computational density.
41. The method according to claim 40 , wherein the processor computational power and the processor power output vary with frequency and voltage and wherein the means for selecting a processor design from a plurality of processor designs includes means for selecting an appropriate frequency and voltage for each processor design.