Semiconductor device and method of manufacturing the same
View Patent ↗A semiconductor device having a structure in which no short circuit occurs between plug interconnections even when a void occurs in an insulating layer in a gap between wiring layers and a method of manufacturing the same are attained. The method includes: a step of forming transfer gates so as to be close to each other with a gap on a semiconductor substrate; a step of burying the gap and covering a wiring layer; a step of opening a contact hole in an insulating layer in the gap portion; a step of depositing a short-circuit preventing insulating film in the contact hole; an etch back step of removing the short-circuit preventing insulating film at least on the bottom of the gap to expose the semiconductor substrate; and a step of forming a plug interconnection.
1. A semiconductor device comprising:
a plurality of wiring layers disposed in parallel so as to be close to each other with a gap on a base layer which is either a semiconductor layer or a conductive layer;
an insulating layer disposed so as to bury said gap and cover said wiring layers; and
two or more plug interconnections made of a conductive material reaching said base layer, which are disposed at an interval in a part of said insulating layer along the longitudinal direction of said gap in a plan view,
wherein a short-circuit preventing insulating film different from said insulating layer is provided between said plug interconnection and said insulating layer.
2. The semiconductor device according to claim 1 , wherein said short-circuit preventing insulating film enters a void occurring in a portion which buries said gap in said insulating layer.
3. The semiconductor device according to claim 1 , wherein said short-circuit preventing insulating film is at least one of a silicon nitride film and a silicon oxide film.
4. The semiconductor device according to claim 1 , wherein said conductive material is polysilicon containing an impurity.
5. The semiconductor device according to claim 1 , wherein said plurality of wiring layers are a transfer gate serving as a word line, and said plug interconnection is a polypad connecting said base layer and a bit line.
6. A method of manufacturing a semiconductor device, comprising:
a close wiring layer forming step of forming a plurality of wiring layers in parallel and close to each other with a gap between neighboring wiring layers on a base layer which is either a semiconductor layer or a conducting layer;
an insulating layer depositing step of depositing an insulating layer covering said wiring layer so as to bury said gap;
a contact hole opening step of opening two or more contact holes at an interval in said insulating layer along the longitudinal direction of said gap in a plan view;
a short-circuit preventing insulating film depositing step of depositing a short-circuit preventing insulating film in said contact hole;
a short-circuit preventing film removing step of removing at least said short-circuit preventing insulating film on the bottom of said contact hole to expose said base layer; and
a plug interconnection forming step of forming a plug interconnection in contact with said base layer by using a conductive material so as to bury said contact hole.
7. The method of manufacturing a semiconductor device according to claim 6 , wherein said close wiring layer forming step includes a covering insulating film forming step of forming a covering insulating film covering each of wiring layers formed on said base layer and the base layer in said gap.
8. The method of manufacturing a semiconductor device according to claim 7 , wherein in said contact hole opening step, a contact hole is opened so as to reach the covering insulating film which covers said base layer of the bottom of said gap formed in said covering insulating film forming step.
9. The method of manufacturing a semiconductor device according to claim 7 , wherein said contact hole opening step includes a covering insulating film removing step of removing the covering insulating film covering said base layer of the bottom of said gap to expose said base layer.
10. The method of manufacturing a semiconductor device according to claim 6 , wherein in said short-circuit preventing insulating film depositing step, at least one of a silicon nitride film and a silicon oxide film is deposited by CVD.
11. The method of manufacturing a semiconductor device according to claim 6 , wherein said plurality of wiring layers are a transfer gate as a word line, and said plug interconnection is a polypad which connects said base layer and a bit line.