IP Library Granted Patent US 6,519,180
Granted Patent Utility
US 6,519,180 · Confirmation No. 1025

ARRAY ARCHITECTURE AND OPERATING METHODS FOR DIGITAL MULTILEVEL NONVOLATILE MEMORY INTEGRATED CIRCUIT SYSTEM

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Code Description Pages PDF
2012-07-06 EBCC.AD Notice of Change of Address Place in File Wrapper Due to Electronic Business Center(EBC) Customer Number Update 1 View
2005-03-30 XRUSH Internal Response to Printer Query from Technology Center(TC) 3 View
2001-10-19 TRNA Transmittal of New Application 4 View
2001-10-19 DRW Drawings-only black and white line drawings 48 View
2001-08-13 TRNA Transmittal of New Application 2 View
2001-08-13 ADS Application Data Sheet 2 View
2001-08-13 A.PE Preliminary Amendment 47 View
2001-08-13 SPEC Specification 72 View
2001-08-13 CLM Claims 1 View
2001-08-13 ABST Abstract 1 View
2001-08-13 DRW Drawings-only black and white line drawings 47 View
2001-08-13 OATH Oath or Declaration filed 2 View
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Quick Facts
Patent No.
US 6,519,180
App. No.
09/929,370
Filed
2001-08-13
Granted
2003-02-11
Pub. No.
US20020039322A1
Examiner
DINH, SON T
Art Unit
2824
PTA
0 days