IP Library Granted Patent US 6,931,606
Granted Patent B1
US 6,931,606 · App. 09/978,141 · Granted Aug 16, 2005

Automatic method and system for instantiating built-in-test (BIST) modules in ASIC memory designs

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Quick Facts
Patent No.
US 6,931,606
App. No.
09/978,141
Granted
Aug 16, 2005
Kind
B1
Abstract

A method and system for automatically instantiating built-in-system test (BIST) modules in memory designs is disclosed. The method and system include providing a server over a network that integrates a set of design tools, including an automated front-end software process and an automated back-end software process. According to the method and system, a user may access the server over the network and enter a request for a memory design. The front-end software process is then executed to automatically generate a netlist of a BIST from the user request. Thereafter, the back-end software process is executed to automatically generate a placement and route view of the BIST.

Claims (28)

1. A method for automatically instantiating built-in-system test (BIST) modules in memory designs, comprising the steps of:

(a) providing a server over a network that integrates a set of design tools, including an automated front-end software process and an automated back-end software process;

(b) allowing a user to access the server over the network and enter a request for a memory design;

(c) executing the front-end software process to automatically generate a netlist of a BIST from the user request; and

(d) executing the back-end software process to automatically generate a placement and route view of the BIST

(i) generating an initial size estimate of an area needed for the memory;

(ii) allocating a memory having an area of that size;

(iii) performing placement and routing; and

(iv) assessing whether the allocated area is sufficient, and if not, incrementing the size of the memory and iterating again.

2. The method of claim 1 wherein step (b) further includes the step of allowing the user to access the server via a standard Web browser.

3. The method of claim 2 wherein step (b) further includes the step of allowing a user to enter the request by entering data into a form and identifying an input script file containing a series of user input command lines.

4. The method of claim 3 wherein step (b) further includes the step of receiving from the request a number of words and bits in the memory.

5. The method of claim 4 wherein step (c) further includes the step of in putting the command lines from the input script file into appropriate software design tools.

6. The method of claim 5 further including the step of providing a random access memory (RAM) as the memory, and generating a RAMBIST for the memory.

7. A computer readable medium containing program instructions for method for automatically instantiating built-in-system test (BIST) modules in memory designs, comprising the steps of:

(a) providing a server over a network that integrates a set of design tools, including an automated front-end software process and an automated back-end software process;

(b) allowing a user to access the server over the network and enter a request for a memory design;

(c) executing the front-end software process to automatically generate a netlist of a BIST from the user request; and

(d) executing the back-end software process to automatically generate a placement and route view of the BIST

(i) generating an initial size estimate of an area needed for the memory;

(ii) allocating a memory having an area of that size;

(iii) performing placement and routing; and

(iv) assessing whether the allocated area is sufficient, and if not, incrementing the size of the memory and iterating again.

8. The computer readable medium of claim 7 wherein instruction (b) further includes the instruction of allowing the user to access the server via a standard Web browser.

9. The computer readable medium of claim 8 wherein instruction (b) further includes the instruction of allowing a user to enter the request by entering data into a form and identifying an input script file containing a series of user input command lines.

10. The computer readable medium of claim 9 wherein instruction (b) further includes the instruction of receiving from the request a number of words and bits in the memory.

11. The computer readable medium of claim 10 wherein instruction (c) further includes the instruction of in putting the command lines from the input script file into appropriate software design tools.

12. The computer readable medium of claim 11 further including the instruction of providing a random access memory (RAM) as the memory, and generating a RAMBIST for the memory.

Assignments (10)
RELEASE OF SECURITY INTEREST Recorded Apr 15, 2022
From: CORTLAND CAPITAL MARKET SERVICES LLC
To: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
Reel/Frame 059720/0223 →
SECURITY INTEREST Recorded Feb 1, 2018
From: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
To: CORTLAND CAPITAL MARKET SERVICES LLC, AS COLLATERAL AGENT
Reel/Frame 045216/0020 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2017
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.; BROADCOM CORPORATION
To: BELL SEMICONDUCTOR, LLC
Reel/Frame 044887/0109 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
CHANGE OF NAME Recorded Jun 6, 2014
From: LSI LOGIC CORPORATION
To: LSI CORPORATION
Reel/Frame 033102/0270 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2001
From: KRECHMER, YARON; PORTER, MICHAEL; OBRIEN, TOM
To: LSI LOGIC CORPORATION
Reel/Frame 012284/0303 →