Granted Patent
Utility
US 6,725,325
· Confirmation No. 7889
SEMICONDUCTOR MEMORY DEVICE HAVING A DOUBLE DATA RATE (DDR) MODE AND UTILIZING A PLURALITY OF COMPARISON CIRCUITS TO PREVENT ERRORS DUE TO A LATE WRITE FUNCTION
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2004-03-10 | IFEE |
Issue Fee Payment (PTO-85B) | 1 | View | |
| 2001-12-07 | TRNA |
Transmittal of New Application | 2 | View | |
| 2001-12-07 | SPEC |
Specification | 30 | View | |
| 2001-12-07 | CLM |
Claims | 5 | View | |
| 2001-12-07 | ABST |
Abstract | 1 | View | |
| 2001-12-07 | DRW |
Drawings-only black and white line drawings | 8 | View | |
| 2001-12-07 | OATH |
Oath or Declaration filed | 4 | View |
Inventors
Attorneys & Agents of Record
Classification
USPC
711/104
G11C7/1066
G11C7/1006
G11C7/1018
G11C7/1072
G11C7/22
Prosecution
- Examiner
- GOSSAGE, GLENN
- Art Unit
- 2187
- Customer No.
- 20457
- Docket No.
- 500.40943X00
- Confirmation No.
- 7889
Foreign Priority
2000-372243
·
2000-12-07
·
JAPAN
Publication
- Pub. No.
- US20020071332A1
- Pub. Date
- 2002-06-13
Patent Term Adjustment
-33days
No related applications found.
CHANGE OF ADDRESS
Recorded 2017-11-29
MERGER/CHANGE OF NAME
Recorded 2011-08-31
from
HITACHI, LTD.
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2003-09-26
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2001-12-07
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Quick Facts
- Patent No.
- US 6,725,325
- App. No.
- 10/005,361
- Filed
- 2001-12-07
- Granted
- 2004-04-20
- Pub. No.
- US20020071332A1
- Examiner
- GOSSAGE, GLENN
- Art Unit
- 2187
- PTA
- -33 days
External Links