Stacking structure for semiconductor devices using a folded over flexible substrate and method therefor
View Patent ↗A semiconductor stacking structure has a semiconductor device. A flexible substrate is coupled to a bottom surface of the semiconductor device. The flexible substrate is folded over on at least two sides to form flap portions. The flap portions are coupled to an upper surface of the first semiconductor device and covers only a portion of the upper surface of the semiconductor device.
1. A semiconductor stacking structure comprising:
a semiconductor die;
a flexible tape substrate having at least one metal layers for electrical connections wherein the flexible tape substrate is coupled to a bottom surface of the semiconductor die;
wirebonds for electrically coupling the semiconductor die to the metal layer; and
an encapsulant covering the semiconductor die and the wirebonds;
wherein the flexible tape substrate further comprises a plurality of flap portions and each flap portion is folded along a side surface and an upper surface of the encapsulant;
wherein the flap portions do not over lap one another and cover only a portion of the upper surface of the encapsulant;
wherein the folded flap portions have an exposed metal layer.
2. A semiconductor stacking structure in accordance with claim 1 further comprising an adhesive layer which is placed on the flap portions of the flexible tape substrate and which couples the flap portions to the upper surface of the encapsulant.
3. A semiconductor stacking structure in accordance with claim 1 further comprising an adhesive layer which is placed on the upper surface of the encapsulant and which couples the flap portions to the encapsulant.
4. A semiconductor stacking structure in accordance with claim 1 further comprising a semiconductor device coupled to the flap portions of the flexible tape substrate.
5. A semiconductor stacking structure in accordance with claim 4 wherein the semiconductor device is coupled to the flap portions of the flexible tape substrate after the flap portions are folded over and coupled to the encapsulant.
6. A semiconductor stacking structure in accordance with claim 4 wherein the semiconductor device is coupled to the flap portions of the flexible tape substrate before the flap portions are folded over and coupled to the encapsulant.
7. A semiconductor stacking structure in accordance with claim 1 wherein the semiconductor stacking structure is a LGA (Land Grid Array) device.
8. A semiconductor stacking structure in accordance with claim 1 wherein the semiconductor stacking structure is a BGA (Ball Grid Array) device.
9. A semiconductor stacking structure in accordance with claim 1 wherein the semiconductor stacking structure is a lead type of device.
10. A semiconductor stacking structure in accordance with claim 1 wherein the flexible tape substrate is folded over on four sides to form flap portions which are coupled to the upper surface of the encapsulant and covers only a portion of the upper surface of the encapsulant.
11. A semiconductor stacking structure comprising:
a semiconductor die;
means for interconnection having at least one metal layer for electrical connections coupled to a bottom surface of the semiconductor die;
wirebonds for electrically coupling the semiconductor die to the metal layer; and
an encapsulant covering the semiconductor die and the wirebonds;
wherein the interconnection means further comprises a plurality of flap portions and each flap portion is folded along a side surface and an upper surface of the encapsulant;
wherein the flap portions do not over lap one another and cover only a portion of the upper surface of the encapsulant;
wherein the folded flap portions have an exposed metal layer.
12. A semiconductor stacking structure in accordance with claim 11 further comprising an adhesive layer placed on the means for coupling the interconnection means to the upper surface of the encapsulant.
13. A semiconductor stacking structure comprising:
a semiconductor die;
means for interconnection having at least one metal layer for electrical connections coupled to a bottom surface of the semiconductor die;
wirebonds for electrically coupling the semiconductor die to the metal layer; and
an encapsulant covering the semiconductor die and the wirebonds;
wherein the interconnection means further comprises at least four flap portions and each flap portion is folded along a side surface and an upper surface of the encapsulant;
wherein the flap portions do not over lap one another and cover only a portion of the upper surface of the encapsulant;
wherein the folded flap portions have an exposed metal layer.
14. A semiconductor stacking structure in accordance with claim 13 further comprising means placed on the flap portions of the flexible substrate for coupling the flap portions to the encapsulant.
15. A semiconductor stacking structure in accordance with claim 13 further comprising means placed on the upper surface of the encapsulant for coupling the flap portions to the encapsulant.
16. A semiconductor stacking structure in accordance with claim 13 further comprising a semiconductor device coupled to the flap portions of the coupling means.
17. A semiconductor stacking structure in accordance with claim 16 wherein the semiconductor device is coupled to the flap portions of the coupling means after the flap portions are folded over and coupled to the encapsulant.
18. A semiconductor stacking structure in accordance with claim 16 wherein the semiconductor device is coupled to the flap portions of the coupling means before the flap portions are folded over and coupled to the encapsulant.
19. A semiconductor stacking structure in accordance with claim 1 further comprising an adhesive for coupling the semiconductor die to the flexible tape substrate.
20. A semiconductor stacking structure in accordance with claim 11 further comprising an adhesive for coupling the semiconductor die to the means.