Patent Assignment
Reel/Frame 022764/0864
Patent Security Agreement
Recorded: 2009-06-03
Pages: 21
Assignor
AMKOR TECHNOLOGY, INC.
Executed: 2009-04-16
Assignee
BANK OF AMERICA, N.A.
901 MAIN STREET, 22ND FLOOR, DALLAS, TEXAS, 75202
Covered Properties
(238)
Nonexposed Heat Sink for Semiconductor Package
Patent:
7,009,283 →
Application:
09/513,067 →
Leadframe and Semiconductor Package with Improved Solder Joint Strength
Patent:
7,102,208 →
Application:
09/687,048 →
Optical Module with Lens Integral Holder Fabrication Method
Patent:
7,059,040 →
Application:
09/764,196 →
Leadframe and Semiconductor Package Made Using the Leadframe
Embedded Heat Spreader Ball Grid Array
Patent:
7,126,218 →
Application:
09/923,834 →
Semiconductor Package and Leadframe with Horizontal Leads Spaced in the Vertical Direction and Method of Making
Patent:
7,102,216 →
Application:
09/932,290 →
Lead-Frame Connector and Circuit Module Assembly
Patent:
7,019,387 →
Application:
10/076,896 →
Stacking Structure for Semiconductor Devices Using a Folded Over Flexible Substrate and Method Therefor
Patent:
7,154,171 →
Application:
10/082,472 →
Semiconductor Package Including Passive Elements and Method of Manufacture
Semiconductor Package and Method of Manufacturing the Same Which Reduces Warpage
Patent:
7,042,072 →
Application:
10/212,496 →
Optic Semiconductor Module and Manufacturing Method
Integrated Circuit Substrate Having Embedded Passive Comonents and Methods Therefor
Patent:
6,987,661 →
Application:
10/319,022 →
Leadframe Based Memory Card
Patent:
7,095,103 →
Application:
10/427,117 →
Stackable Semiconductor Package and Method for Manufacturing Same
Leadframe Strip Having Enhanced Testability
Patent:
7,008,825 →
Application:
10/445,754 →
Lead Frame with Plated End Leads
Patent:
7,183,630 →
Application:
10/459,230 →
Integrated Circuit Substrate Having Laser-Exposed Terminals
Patent:
7,028,400 →
Application:
10/603,878 →
Drop Resistant Bumpers for Fully Molded Memory Cards
Patent:
7,485,952 →
Application:
10/607,324 →
Multi-Chip Semiconductor Package with Integral Shield and Antenna
Patent:
7,049,682 →
Application:
10/621,780 →
Circuit Module Having Interconnects for Connecting Functioning and Non-Functioning Add Ons and Method Therefor
Patent:
7,102,891 →
Application:
10/625,290 →
Plastic Integrated Circuit Package and Method and Leadframe for Making the Package
Patent:
7,071,541 →
Application:
10/626,150 →
Semiconductor Memory Card
Patent:
8,258,613 →
Application:
10/634,541 →
Near Chip Size Semiconductor Package
Exposed Lead Interposer Leadframe Package
Patent:
7,245,007 →
Application:
10/667,226 →
Leadframe Having Lead Locks to Secure Leads to Encapsulant
Front Edge Chamfer Feature for Fully-Molded Memory Cards
Patent:
6,998,702 →
Application:
10/680,281 →
Semiconductor package including leads and conductive posts for providing increased functionality
Patent:
7,138,707 →
Application:
10/690,193 →
Manufacturing Method for Leadframe and for Semiconductor Package Using the Leadframe
Patent:
7,144,517 →
Application:
10/703,301 →
Semiconductor Package with Chamfered Corners and Method of Manufacturing the Same
Patent:
7,211,879 →
Application:
10/706,468 →
Photodetectors and Optically Pumped Emitters Based on Iii-Nitride Multiple-Quantum-Well Structures
Image Sensor Package and Method for Manufacture Thereof
Patent:
7,091,571 →
Application:
10/735,184 →
Semiconductor Package with Substrate Coupled to a Peripheral Side Surface of a Semiconductor Die
Patent:
7,009,296 →
Application:
10/759,990 →
Semiconductor Package Having Reduced Thickness
Cavity Case with Clip/Plug for Use on Multi-Media Card
Patent:
7,057,268 →
Application:
10/765,397 →
Leadframe Type Semiconductor Package Having Reduced Inductance and Its Manufacturing Method
Patent:
7,091,594 →
Application:
10/766,046 →
Double Mold Memory Card and Its Manufacturing Method
Patent:
7,633,763 →
Application:
10/766,101 →
Lead Frame for Semiconductor Package
Semiconductor Package and Method for Fabricating the Same
Stackable Semiconductor Package Having Semiconductor Chip Within Central Through Hole of Substrate
Method of Manufacturing a Semiconductor Package
Patent:
7,185,426 →
Application:
10/806,640 →
Semiconductor Package and Method for Fabricating the Same
Patent:
40,112 →
Application:
10/825,670 →
Tape Supported Memory Card Leadframe Structure
Patent:
7,074,654 →
Application:
10/828,616 →
Semiconductor Package and Substrate Having Multi-Level Vias
Patent:
7,145,238 →
Application:
10/839,647 →
Method of Making an Integrated Circuit Package
Patent:
7,005,326 →
Application:
10/847,742 →
Semiconductor Device and Its Manufacturing Method
Patent:
7,145,253 →
Application:
10/865,096 →
Embedded Leadframe Semiconductor Package
Patent:
7,190,062 →
Application:
10/868,244 →
Semiconductor Package Having Improved Adhesiveness and Ground Bonding
Exposed Lead Qfp Package Fabricated Through the Use of a Partial Saw Process
Patent:
7,211,471 →
Application:
10/881,846 →
Stackable Semiconductor Package with Solder on Pads on Which Second Semiconductor Package Is Stacked
Patent:
6,987,314 →
Application:
10/883,593 →
Substrate for Semiconductor Package and Wire Bonding Method Using Thereof
Semiconductor Package and Method for Manufacturing the Same
Patent:
7,045,893 →
Application:
10/892,625 →
Offset Etched Corner Leads for Semiconductor Package
Patent:
7,598,598 →
Application:
10/910,089 →
Semiconductor Package and Its Manufacturing Method
Patent:
7,202,554 →
Application:
10/921,642 →
Pre-Molded Leadframe
Patent:
7,102,214 →
Application:
10/923,575 →
Semiconductor Package Including Flip Chip
Method for Making an Integrated Circuit Substrate Having Embedded Back-Side Access Conductors and Vias
Image Sensor Package and Its Manufacturing Method
Patent:
7,359,579 →
Application:
10/962,221 →
Memory Card and Its Manufacturing Method
Patent:
7,201,327 →
Application:
10/967,462 →
Fan-In Leadframe Semiconductor Package
Patent:
7,217,991 →
Application:
10/971,408 →
Memory Card Esc Substrate Insert
Patent:
7,193,305 →
Application:
10/980,355 →
Integrated Circuit Device Packages and Substrates for Making the Packages
Patent:
7,253,503 →
Application:
10/986,634 →
Interposer for Interconnecting Components in a Memory Card
Patent:
7,358,600 →
Application:
10/990,265 →
Stacked-Die Extension Support Structure and Method Thereof
Patent:
7,071,568 →
Application:
10/991,631 →
Shielded Package Having Shield Fence
Patent:
7,629,674 →
Application:
10/992,036 →
Wafer-Level Chip-Scale Package
Patent:
6,987,319 →
Application:
11/006,210 →
Method of Making a Leadframe for Semiconductor Devices
Patent:
7,001,799 →
Application:
11/009,262 →
Thermally Enhanced Chip Scale Lead on Chip Semiconductor Package and Method of Making Same
Patent:
7,064,009 →
Application:
11/018,731 →
Plastic Integrated Circuit Package and Method and Leadframe for Making the Package
Patent:
7,030,474 →
Application:
11/021,340 →
Method for Making an Integrated Circuit Substrate Having Laser-Embedded Conductive Patterns
Patent:
7,312,103 →
Application:
11/021,977 →
Lead-Frame Method and Assembly for Interconnecting Circuits Within a Circuit Module
Patent:
7,176,062 →
Application:
11/035,239 →
Colored Conductive Wires for a Semiconductor Package
Increased Capacity Leadframe and Semiconductor Package Using the Same
Patent:
7,214,326 →
Application:
11/039,434 →
Two-Sided Wafer Escape Package
Patent:
7,247,523 →
Application:
11/047,848 →
Memory Card and Its Manufacturing Method
Patent:
7,220,915 →
Application:
11/060,263 →
Secure Digital Memory Card Using Land Grid Array Structure
Patent:
7,112,875 →
Application:
11/060,264 →
Semiconductor Package with Increased Number of Input and Output Pins
Method for Making an Integrated Circuit Substrate Having Embedded Passive Components
Patent:
7,334,326 →
Application:
11/078,833 →
Reduced size semiconductor package with stacked dies
Application:
11/079,836 →
Publication:
US 2005/0156292
Method for making an integrated circuit substrate having laminated laser-embedded circuit layers
Patent:
8,826,531 →
Application:
11/098,995 →
Methods of Forming Solder Bumps on Exposed Metal Pads
Surface Acoustic Wave (Saw) Device Package and Method for Packaging a Saw Device
Patent:
7,362,038 →
Application:
11/108,359 →
Die Down Multi-Media Card and Method of Making Same
Patent:
7,011,251 →
Application:
11/109,329 →
Die-Mounting Substrate and Method Incorporating Dummy Traces for Improving Mounting Film Planarity
Patent:
7,755,176 →
Application:
11/111,316 →
Image Sensor Package and Its Manufacturing Method
Patent:
7,227,236 →
Application:
11/115,574 →
Wafer Level Chip Scale Package and Manufacturing Method for the Same
Patent:
7,446,422 →
Application:
11/115,579 →
Stacked Die Assembly Having Semiconductor Die Overhanging Support
Patent:
7,132,753 →
Application:
11/115,706 →
Camera Module Having a Threaded Lens Barrel and a Ball Grid Array Connecting Device
Secure Digital Memory Card Using Land Grid Array Structure
Patent:
7,293,716 →
Application:
11/120,087 →
Wafer Level Package and Fabrication Method
Patent:
7,192,807 →
Application:
11/123,605 →
Wafer Level Stacked Package
Patent:
7,170,183 →
Application:
11/128,633 →
Thin Semiconductor Package Including Stacked Dies
Circuit-On-Foil Process for Manufacturing a Laminated Semiconductor Package Substrate Having Embedded Conductive Patterns
Patent:
7,297,562 →
Application:
11/166,005 →
Package in Package (Pip)
Patent:
7,745,918 →
Application:
11/168,168 →
Direct Glass Attached on Die Optical Module
Patent:
7,576,401 →
Application:
11/177,904 →
Apparatus and Method for Testing Integrated Circuit Devices Having Contacts on Multiple Surfaces
Patent:
7,385,408 →
Application:
11/180,463 →
Land Patterns for a Semiconductor Stacking Structure and Method Therefor
Patent:
7,429,799 →
Application:
11/190,596 →
Transducer Assembly, Capillary and Wire Bonding Method Using the Same
Thermally Enhanced Chip Scale Lead on Chip Semiconductor Package and Method of Making Same
Patent:
7,045,883 →
Application:
11/198,074 →
Snap Lid Camera Module
Stack Land Grid Array Package and Method for Manufacturing the Same
Patent:
7,408,254 →
Application:
11/212,979 →
Wafer Level Chip Scale Package
Patent:
7,335,986 →
Application:
11/227,410 →
Wire Bonding Machine Capable of Removing Particles from Capillary and Cleaning Method of Capillary Bottom Tip
Method of Forming a Stack of Semiconductor Packages
Patent:
7,459,349 →
Application:
11/254,339 →
Enhanced Durability Memory Card
Patent:
7,375,975 →
Application:
11/263,428 →
Method for Manufacturing a Semiconductor Device Substrate
Patent:
7,317,245 →
Application:
11/279,002 →
Method of Forming a Stacked Semiconductor Package
Modular Memory Card and Method of Making Same
Patent:
7,837,120 →
Application:
11/288,906 →
Etch Singulated Semiconductor Package
Patent:
7,507,603 →
Application:
11/292,778 →
Semiconductor Package Including a Top-Surface Metal Layer for Implementing Circuit Features
Patent:
7,633,765 →
Application:
11/293,999 →
Stacked Embedded Leadframe
Patent:
7,361,533 →
Application:
11/297,050 →
Embedded Electronic Component Package
Patent:
7,572,681 →
Application:
11/298,016 →
Method of Making an Integrated Circuit Package
Patent:
7,112,474 →
Application:
11/299,859 →
Optical Module Having Cavity Substrate
Patent:
7,609,461 →
Application:
11/315,994 →
Multiple Cover Memory Card
Patent:
7,359,204 →
Application:
11/355,092 →
Stacked Electronic Component Package Having Film-on-Wire Spacer
Patent:
7,675,180 →
Application:
11/356,921 →
Semiconductor Device Having Rf Shielding and Method Therefor
Patent:
7,342,303 →
Application:
11/364,427 →
Semiconductor Package and Method of Making Using Leadframe Having Lead Locks to Secure Leads to Encapsulant
Land Patterns for a Semiconductor Stacking Structure and Method Therefor
Patent:
7,652,361 →
Application:
11/367,171 →
Leadframe and Semiconductor Package Made Using the Leadframe
Chamfered Memory Card Module and Method of Making Same
Patent:
7,719,845 →
Application:
11/379,550 →
Semiconductor Package Including Premold and Method of Manufacturing the Same
Application:
11/382,615 →
Semiconductor Package Having Improved Adhesiveness and Ground Bonding
Tape Supported Memory Card Leadframe Structure
Patent:
7,556,986 →
Application:
11/425,502 →
Side Leaded, Bottom Exposed Pad and Bottom Exposed Lead Fusion Quad Flat Semiconductor Package
Patent:
7,968,998 →
Application:
11/425,505 →
Secure Digital Memory Card Using Land Grid Array Structure
Patent:
7,485,491 →
Application:
11/427,454 →
Substrate for Semiconductor Device and Manufacturing Method Thereof
Patent:
7,902,660 →
Application:
11/440,548 →
Semiconductor Package
Patent:
7,633,144 →
Application:
11/440,662 →
Capacitor and Resistor Having Anodic Metal and Anodic Metal Oxide Structure
Patent:
7,755,164 →
Application:
11/472,874 →
Semiconductor Package Having Reduced Thickness
Patent:
7,321,162 →
Application:
11/492,481 →
Buildup Dielectric and Metallization Process and Semiconductor Package
Patent:
7,548,430 →
Application:
11/497,617 →
Method of Making an Integrated Circuit Package
Patent:
7,332,375 →
Application:
11/503,752 →
Lead Frame for Semiconductor Package
Semiconductor Package Substrate Fabrication Method
Patent:
7,501,338 →
Application:
11/527,104 →
Semiconductor Package and Substrate Having Multi-Level Vias Fabrication Method
Patent:
7,365,006 →
Application:
11/527,827 →
Stacked Die Assembly Having Semiconductor Die Projecting Beyond Support
Patent:
7,459,776 →
Application:
11/529,467 →
Embedded Metal Features Structure
Patent:
7,589,398 →
Application:
11/543,540 →
Thermally Enhanced Semiconductor Package
Stacked Redistribution Layer (Rdl) Die Assembly Package
Patent:
7,550,857 →
Application:
11/560,496 →
Membrane Die Attach Circuit Element Package and Method Therefor
Patent:
7,781,852 →
Application:
11/566,731 →
Exposed Die Overmolded Flip Chip Package and Fabrication Method
Patent:
7,898,093 →
Application:
11/592,889 →
Semiconductor Package Including Top-Surface Terminals for Mounting Another Semiconductor Package
Patent:
7,671,457 →
Application:
11/595,411 →
Electronic Component Package Comprising Fan-Out and Fan-in Traces
Patent:
7,714,431 →
Application:
11/605,740 →
Blind via Capture Pad Structure
Patent:
7,750,250 →
Application:
11/615,467 →
Exposed Metal Bezel for Use in Sensor Devices and Method Therefor
Patent:
7,859,116 →
Application:
11/616,069 →
Semiconductor Package Having Leadframe with Exposed Anchor Pads
Method of Fabricating an Embedded Circuit Pattern
Patent:
7,752,752 →
Application:
11/621,402 →
Methods of Forming Back Side Layers for Thinned Wafers
Stackable Semiconductor Package Including Laminate Interposer
Patent:
7,829,990 →
Application:
11/624,648 →
Methods of Forming Metal Layers Using Multi-Layer Lift-Off Patterns
Electronic Devices Including Solder Bumps on Compliant Dielectric Layers
Semiconductor Package in Package
Patent:
9,466,545 →
Application:
11/677,506 →
High Density Memory Card Using Folded Flex
Patent:
9,367,712 →
Application:
11/681,121 →
Stackable Semiconductor Package Having Partially Exposed Semiconductor Die and Method of Fabricating the Same
Patent:
7,982,297 →
Application:
11/682,666 →
Method for Fabricating a Fan-in Leadframe Semiconductor Package
Patent:
7,473,584 →
Application:
11/685,072 →
Camera Module Fabrication Method Including the Step of Removing a Lens Mount and Window from the Mold
Semiconductor Package and Fabricating Method Thereof
Patent:
7,808,105 →
Application:
11/734,999 →
A Semiconductor Device Having Emi Shielding and Method Therefor
Patent:
7,898,066 →
Application:
11/754,209 →
Metal Etch Stop Fabrication Method and Structure
Patent:
7,923,645 →
Application:
11/765,806 →
Motion Picture Coding Apparatus and Method of Coding Motion Pictures
Application:
11/765,858 →
Publication:
US 2008/0002769
Semiconductor Device Having Rf Shielding and Method Therefor
Patent:
7,745,910 →
Application:
11/775,492 →
Fusion Quad Flat Semiconductor Package
Two-Sided Wafer Escape Package
Patent:
7,420,272 →
Application:
11/784,979 →
Direct-Write Wafer Level Chip Scale Package
Semiconductor Device Having a Stacked Bump to Reduce Kirkendall Voids and or Cracks and Method of Manufacturing
Dual Laminate Package Structure with Embedded Elements
Patent:
7,687,899 →
Application:
11/835,235 →
Straight Conductor Blind via Capture Pad Structure and Fabrication Method
Patent:
8,323,771 →
Application:
11/839,277 →
Thin Stacked Interposer Package
Patent:
7,777,351 →
Application:
11/865,617 →
Semiconductor Package with Increased I/O Density and Method of Making the Same
Patent:
8,089,159 →
Application:
11/866,886 →
Wafer Level Package Utilizing Laser-Activated Dielectric Material
Patent:
7,632,753 →
Application:
11/867,293 →
Structure of Bond Pad for Semiconductor Die and Method Therefor
Patent:
8,198,738 →
Application:
11/873,229 →
Solder Attach Film and Method of Forming Solder Ball Using the Same
Patent:
7,718,523 →
Application:
11/875,597 →
Substrate Having Stiffener Fabrication Method
Embedded Passive Component Network Substrate Fabrication Method
Patent:
7,958,626 →
Application:
11/924,156 →
Semiconductor Package and Fabrication Method Thereof
Patent:
7,919,853 →
Application:
11/933,908 →
Reduced Size Stacked Semiconductor Package and Method of Making the Same
Patent:
7,847,386 →
Application:
11/935,314 →
Semiconductor Package Having Reduced Thickness
Application:
11/947,505 →
Publication:
US 2008/0283979
Thin Substrate Fabrication Method and Structure
Patent:
8,017,436 →
Application:
11/953,680 →
Integrated Circuit Package and Method of Making the Same
Patent:
7,560,804 →
Application:
11/970,712 →
Semiconductor Device Having Rf Shielding and Method Therefor
Patent:
8,299,610 →
Application:
11/971,577 →
Circuit-On-Foil Process for Manufacturing a Laminated Semiconductor Package Substrate Having Embedded Conductive Patterns
Patent:
8,322,030 →
Application:
11/982,637 →
Method of using a camera module
Application:
12/005,081 →
Publication:
US 2008/0106624
Semiconductor Package with Patterning Layer and Method of Making Same
Patent:
7,956,453 →
Application:
12/015,428 →
Stacked Semiconductor Package and Method of Making Same
Patent:
7,723,852 →
Application:
12/017,266 →
Shielded Trace Structure and Fabrication Method
Patent:
7,832,097 →
Application:
12/018,435 →
Semiconductor Package Having a Land to Absorb Thermal and Mechanical Stress and Fabricating Method Thereof
Patent:
7,982,316 →
Application:
12/025,336 →
Semiconductor Device Having Improved Contact Interface Reliability and Method Therefor
Patent:
8,193,624 →
Application:
12/036,498 →
Flat Semiconductor Package with Half Package Molding
Patent:
8,067,821 →
Application:
12/100,886 →
Semiconductor Package with Fast Power-Up Cycle and Method of Making Same
Patent:
7,768,135 →
Application:
12/105,196 →
System and Method to Reduce Shorting of Radio Frequency (Rf) Shielding
Patent:
8,008,753 →
Application:
12/107,478 →
Semiconductor Device Having Reduced Thermal Interface Material (Tim) Degradation and Method Therefor
Patent:
7,906,845 →
Application:
12/108,419 →
Lead Free Alloy Bump Structure and Fabrication Method
Patent:
7,994,043 →
Application:
12/108,909 →
Semiconductor Package with Half-Etched Locking Features
Patent:
7,808,084 →
Application:
12/116,127 →
Semiconductor Device Having Redistribution Layer
Patent:
8,058,726 →
Application:
12/116,695 →
Flip Chip Bump Structure and Fabrication Method
Patent:
7,932,170 →
Application:
12/144,145 →
Multi-Level Circuit Substrate Fabrication Method
Patent:
8,316,536 →
Application:
12/151,857 →
Semiconductor Device Having Improved Contact Interface Reliability and Method Therefor
Patent:
7,944,043 →
Application:
12/169,151 →
Increased I/O Semiconductor Package and Method of Making Same
Patent:
8,125,064 →
Application:
12/181,256 →
Tunneling IPV6 Packets
Increased Capacity Semiconductor Package
Patent:
8,184,453 →
Application:
12/183,979 →
Land Patterns for a Semiconductor Stacking Structure and Method Therefor
Patent:
7,691,745 →
Application:
12/187,578 →
Semiconductor Package Having Through Holes
Patent:
7,843,072 →
Application:
12/190,039 →
Semiconductor Device Having Insulating and Interconnection Layers
Patent:
8,334,590 →
Application:
12/204,692 →
Two-Sided Fan-Out Wafer Escape Package
Patent:
7,692,286 →
Application:
12/221,797 →
Camera Module with Window Mechanical Attachment
Ultra Thin Package and Fabrication Method
Patent:
7,842,541 →
Application:
12/237,173 →
Semiconductor Device Including Leadframe with Increased I/O
Patent:
7,847,392 →
Application:
12/242,603 →
Increased I/O Leadframe and Semiconductor Device Including Same
Patent:
7,989,933 →
Application:
12/246,226 →
Semiconductor Device with Increased I/O Leadframe
Patent:
8,008,758 →
Application:
12/259,096 →
Package Failure Prognostic Structure and Method
Patent:
8,022,521 →
Application:
12/269,357 →
Semiconductor Devices and Fabrication Methods Thereof
Patent:
7,843,052 →
Application:
12/270,690 →
Semiconductor Device Including Increased Capacity Leadframe
Patent:
8,089,145 →
Application:
12/272,606 →
Semiconductor Device with Increased I/O Leadframe Including Passive Device
Patent:
8,072,050 →
Application:
12/273,500 →
Semiconductor Device Including Leadframe Having Power Bars and Increased I/O
Patent:
7,875,963 →
Application:
12/276,121 →
Stackable Semiconductor Package
Patent:
7,737,542 →
Application:
12/291,119 →
Stacked Flip Chip Die Assembly
Patent:
7,859,119 →
Application:
12/291,767 →
Adhesive on Wire Stacked Semiconductor Package
System and Method to Provide Rf Shielding for a Mems Microphone Package
Shielding for a Semiconductor Package
Patent:
8,129,824 →
Application:
12/327,716 →
Package in Package Semiconductor Device
Patent:
7,982,298 →
Application:
12/327,763 →
Package in Package Semiconductor Device with Film Over Wire
Patent:
8,487,420 →
Application:
12/330,424 →
System and Method for Compartmental Shielding of Stacked Packages
Patent:
8,102,032 →
Application:
12/330,769 →
Semiconductor Device Having Emi Shielding and Method Therefor
Patent:
8,012,868 →
Application:
12/335,365 →
Exhaust Purification Apparatus for Engine
Semiconductor Package Having a Heat Spreader with an Exposed Exterior Surface and a Top Mold Gate
Patent:
8,018,072 →
Application:
12/342,386 →
System and Method for Shielding of Package on Package (Pop) Assemblies
Patent:
7,851,894 →
Application:
12/342,829 →
Protruding Post Substrate Package Structure and Method
Patent:
8,176,628 →
Application:
12/342,839 →
Semiconductor Device with Through Mold Via
Application:
12/348,813 →
Leadframe Structure for Concentrated Photovoltaic Receiver Package
Patent:
8,680,656 →
Application:
12/348,853 →
Extended Landing Pad Substrate Package Structure and Method
Patent:
8,872,329 →
Application:
12/351,596 →
Package in Package Device for Rf Transceiver Module
Patent:
8,058,715 →
Application:
12/351,690 →
Etch Singulated Semiconductor Package
Patent:
7,732,899 →
Application:
12/365,682 →
Reduced Profile Stackable Semiconductor Package
Patent:
8,026,589 →
Application:
12/390,999 →
Reversible Top/Bottom Mems Package
Patent:
8,030,722 →
Application:
12/397,470 →
Conformal Shield on Punch Qfn Semiconductor Package
Patent:
7,960,818 →
Application:
12/398,089 →
Leadframe for Semiconductor Package
Adhesive Composition for Semiconductor Device
Patent:
8,004,078 →
Application:
12/405,854 →
Fine Pitch Copper Pillar Package and Method
Patent:
8,536,458 →
Application:
12/414,220 →
Semiconductor Device with Increased I/O Leadframe Including Power Bars
Patent:
8,575,742 →
Application:
12/419,180 →
Related Assignments
(4)
Other recorded transfers of the patents in this record — the chain of ownership.
Patent Security Agreement
Dec 6, 2012
From: AMKOR TECHNOLOGY, INC.
To: BANK OF AMERICA, N.A.
Reel/Frame 029422/0178 →
Security Interest
Aug 1, 2018
From: AMKOR TECHNOLOGY, INC.
To: BANK OF AMERICA, N.A., AS AGENT
Reel/Frame 046683/0139 →
Assignment of Assignor's Interest
Oct 9, 2020
From: AMKOR TECHNOLOGY, INC.
To: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE.LTD.
Reel/Frame 054067/0135 →
Assignment of Assignor's Interest
Jan 9, 2024
From: GLENN, THOMAS P.
To: AMKOR TECHNOLOGY, INC.
Reel/Frame 066061/0088 →