Land patterns for a semiconductor stacking structure and method therefor
View Patent ↗A semiconductor device has a substrate and an encapsulation area on a first surface of the substrate. A first plurality of metal lands is on the first surface of the substrate around a periphery of the encapsulation area. Solder mask coverers portions of the first plurality of metal lands closest to the encapsulation area. Remaining portions of the first plurality of metal lands are exposed areas having no solder mask.
1. A method for manufacturing a semiconductor package comprising:
providing a substrate having an encapsulation area on a first surface of the substrate;
forming a first plurality of metal lands on the first surface of the substrate around a periphery of the encapsulation area; and
applying a solder mask to portions of each of the first plurality of metal lands closest to the encapsulation area, wherein remaining first plurality of metal lands are entirely exposed metal areas having no solder mask.
2. The method of claim 1 further comprising exposing the metal layers on the substrate around the first plurality of metal lands having exposed areas having no solder mask.
3. The method of claim 2 further comprising forming at least one anchor, the at least one anchor coupled to the exposed metal areas having no solder mask on at least one of the first plurality of metal lands and the substrate.
4. The method of claim 2 further comprising exposing the substrate around the at least one of the second plurality of metal lands that is exposed having no solder mask.
5. The method of claim 1 further comprising forming a plurality of corner lands located in each corner of the first surface of the substrate, wherein at least one corner land in each corner of the first surface of the substrate is exposed having no solder mask.
6. The method of claim 5 further comprising exposing the substrate around the at least one corner land exposed and having no solder mask.
7. The method of claim 5 further comprising forming at least one corner anchor, the at least one corner anchor coupled to the exposed metal area having no solder mask on at least one corner land and the substrate.
8. The method of claim 7 further comprising forming at least one side anchor, the at least one side anchor coupled to the exposed metal area having no solder mask on at least one of the second plurality of metal lands and the substrate.
9. The method of claim 1 further comprising forming a second plurality of metal lands located on an outer periphery of the substrate, wherein at least one of the second plurality of metal lands is exposed having no solder mask.
10. A method of forming a semiconductor device comprising:
providing a substrate having an encapsulation area on a first surface of the substrate; and
forming a first plurality of metal lands on the first surface of the substrate around a periphery of the encapsulation area, a portion of each of the first plurality of metal lands closest to the encapsulation area is solder mask defined and remaining first plurality of metal lands are non-solder mask defined and entirely exposed.
11. The method of claim 10 further comprising forming at least one anchor coupled to a non-solder mask defined and exposed area of one of the first plurality of metal lands and the substrate.
12. The method of claim 10 further comprising forming a plurality of corner lands located in each corner of the first surface of the substrate, wherein at least one corner land in each corner of the first surface of the substrate are non-solder mask defined and exposed.
13. The method of claim 12 further comprising forming at least one corner anchor coupled to the at least one exposed and non-solder mask defined corner land and the substrate.
14. The method of claim 10 further comprising forming a second plurality of metal lands located on an outer periphery of the substrate, wherein at least one of the second plurality of metal lands is non-solder mask defined and exposed.
15. The method of claim 14 further comprising forming at least one side anchor, the at least one side anchor coupled to the at least one of the second plurality of metal lands that are non-solder mask defined and exposed.
16. A method for manufacturing a semiconductor device comprising:
providing a substrate having an encapsulation area formed on the substrate;
forming a first plurality of metal lands on the substrate around a periphery of the encapsulation area; and
applying a solder mask to portions of each of the first plurality of metal lands closest to the encapsulation area, wherein remaining first plurality of metal lands are entirely exposed.
17. The method of claim 16 further comprising exposing the metal layers on the substrate around the first plurality of metal lands having exposed areas having no solder mask.
18. The method of claim 17 further comprising forming at least one anchor coupled to the exposed metal area on at least one of the first plurality of metal lands and the substrate.
19. The method of claim 16 further comprising forming a plurality of corner lands located in each corner of the substrate, wherein at least one corner land in each corner of the substrate is exposed having no solder mask.
20. The method of claim 16 further comprising forming a second plurality of metal lands located on an outer periphery of the substrate, wherein at least one of the second plurality of metal lands is exposed.