Patent Assignment
Reel/Frame 029422/0178
Patent Security Agreement
Recorded: 2012-12-06
Pages: 15
Assignor
AMKOR TECHNOLOGY, INC.
Executed: 2012-09-13
Assignee
BANK OF AMERICA, N.A.
901 MAIN STREET, 22ND FLOOR, DALLAS, TEXAS, 75202
Covered Properties
(140)
Near Chip Size Semiconductor Package
Double Mold Memory Card and Its Manufacturing Method
Patent:
7,633,763 →
Application:
10/766,101 →
Offset Etched Corner Leads for Semiconductor Package
Patent:
7,598,598 →
Application:
10/910,089 →
Semiconductor Package Having a Plurality Input/Output Members
Shielded Package Having Shield Fence
Patent:
7,629,674 →
Application:
10/992,036 →
Die-Mounting Substrate and Method Incorporating Dummy Traces for Improving Mounting Film Planarity
Patent:
7,755,176 →
Application:
11/111,316 →
Package in Package (Pip)
Patent:
7,745,918 →
Application:
11/168,168 →
Direct Glass Attached on Die Optical Module
Patent:
7,576,401 →
Application:
11/177,904 →
Wire Bonding Machine Capable of Removing Particles from Capillary and Cleaning Method of Capillary Bottom Tip
Modular Memory Card and Method of Making Same
Patent:
7,837,120 →
Application:
11/288,906 →
Semiconductor Package Including a Top-Surface Metal Layer for Implementing Circuit Features
Patent:
7,633,765 →
Application:
11/293,999 →
Embedded Electronic Component Package
Patent:
7,572,681 →
Application:
11/298,016 →
Optical Module Having Cavity Substrate
Patent:
7,609,461 →
Application:
11/315,994 →
Stacked Electronic Component Package Having Film-on-Wire Spacer
Patent:
7,675,180 →
Application:
11/356,921 →
Semiconductor Package and Method of Making Using Leadframe Having Lead Locks to Secure Leads to Encapsulant
Land Patterns for a Semiconductor Stacking Structure and Method Therefor
Patent:
7,652,361 →
Application:
11/367,171 →
Chamfered Memory Card Module and Method of Making Same
Patent:
7,719,845 →
Application:
11/379,550 →
Semiconductor Package Having Improved Adhesiveness and Ground Bonding
Tape Supported Memory Card Leadframe Structure
Patent:
7,556,986 →
Application:
11/425,502 →
Side Leaded, Bottom Exposed Pad and Bottom Exposed Lead Fusion Quad Flat Semiconductor Package
Patent:
7,968,998 →
Application:
11/425,505 →
Substrate for Semiconductor Device and Manufacturing Method Thereof
Patent:
7,902,660 →
Application:
11/440,548 →
Semiconductor Package
Patent:
7,633,144 →
Application:
11/440,662 →
Capacitor and Resistor Having Anodic Metal and Anodic Metal Oxide Structure
Patent:
7,755,164 →
Application:
11/472,874 →
Buildup Dielectric and Metallization Process and Semiconductor Package
Patent:
7,548,430 →
Application:
11/497,617 →
Lead Frame for Semiconductor Package
Embedded Metal Features Structure
Patent:
7,589,398 →
Application:
11/543,540 →
Thermally Enhanced Semiconductor Package
Stacked Redistribution Layer (Rdl) Die Assembly Package
Patent:
7,550,857 →
Application:
11/560,496 →
Membrane Die Attach Circuit Element Package and Method Therefor
Patent:
7,781,852 →
Application:
11/566,731 →
Exposed Die Overmolded Flip Chip Package and Fabrication Method
Patent:
7,898,093 →
Application:
11/592,889 →
Semiconductor Package Including Top-Surface Terminals for Mounting Another Semiconductor Package
Patent:
7,671,457 →
Application:
11/595,411 →
Electronic Component Package Comprising Fan-Out and Fan-in Traces
Patent:
7,714,431 →
Application:
11/605,740 →
Blind via Capture Pad Structure
Patent:
7,750,250 →
Application:
11/615,467 →
Exposed Metal Bezel for Use in Sensor Devices and Method Therefor
Patent:
7,859,116 →
Application:
11/616,069 →
Semiconductor Package Having Leadframe with Exposed Anchor Pads
Method of Fabricating an Embedded Circuit Pattern
Patent:
7,752,752 →
Application:
11/621,402 →
Methods of Forming Back Side Layers for Thinned Wafers
Stackable Semiconductor Package Including Laminate Interposer
Patent:
7,829,990 →
Application:
11/624,648 →
Methods of Forming Metal Layers Using Multi-Layer Lift-Off Patterns
Electronic Devices Including Solder Bumps on Compliant Dielectric Layers
Stackable Semiconductor Package Having Partially Exposed Semiconductor Die and Method of Fabricating the Same
Patent:
7,982,297 →
Application:
11/682,666 →
Semiconductor Package and Fabricating Method Thereof
Patent:
7,808,105 →
Application:
11/734,999 →
A Semiconductor Device Having Emi Shielding and Method Therefor
Patent:
7,898,066 →
Application:
11/754,209 →
Metal Etch Stop Fabrication Method and Structure
Patent:
7,923,645 →
Application:
11/765,806 →
Embedded Die Metal Etch Stop Fabrication Method and Structure
Patent:
7,951,697 →
Application:
11/765,828 →
Semiconductor Device Having Rf Shielding and Method Therefor
Patent:
7,745,910 →
Application:
11/775,492 →
Fusion Quad Flat Semiconductor Package
Direct-Write Wafer Level Chip Scale Package
Semiconductor Device Having a Stacked Bump to Reduce Kirkendall Voids and or Cracks and Method of Manufacturing
Dual Laminate Package Structure with Embedded Elements
Patent:
7,687,899 →
Application:
11/835,235 →
Thin Stacked Interposer Package
Patent:
7,777,351 →
Application:
11/865,617 →
Semiconductor Package with Increased I/O Density and Method of Making the Same
Patent:
8,089,159 →
Application:
11/866,886 →
Wafer Level Package Utilizing Laser-Activated Dielectric Material
Patent:
7,632,753 →
Application:
11/867,293 →
Solder Attach Film and Method of Forming Solder Ball Using the Same
Patent:
7,718,523 →
Application:
11/875,597 →
Substrate Having Stiffener Fabrication Method
Embedded Passive Component Network Substrate Fabrication Method
Patent:
7,958,626 →
Application:
11/924,156 →
Semiconductor Package and Fabrication Method Thereof
Patent:
7,919,853 →
Application:
11/933,908 →
Reduced Size Stacked Semiconductor Package and Method of Making the Same
Patent:
7,847,386 →
Application:
11/935,314 →
Thin Substrate Fabrication Method and Structure
Patent:
8,017,436 →
Application:
11/953,680 →
Integrated Circuit Package and Method of Making the Same
Patent:
7,560,804 →
Application:
11/970,712 →
Semiconductor Package with Patterning Layer and Method of Making Same
Patent:
7,956,453 →
Application:
12/015,428 →
Stacked Semiconductor Package and Method of Making Same
Patent:
7,723,852 →
Application:
12/017,266 →
Shielded Trace Structure and Fabrication Method
Patent:
7,832,097 →
Application:
12/018,435 →
Semiconductor Package Having a Land to Absorb Thermal and Mechanical Stress and Fabricating Method Thereof
Patent:
7,982,316 →
Application:
12/025,336 →
Flat Semiconductor Package with Half Package Molding
Patent:
8,067,821 →
Application:
12/100,886 →
Semiconductor Package with Fast Power-Up Cycle and Method of Making Same
Patent:
7,768,135 →
Application:
12/105,196 →
System and Method to Reduce Shorting of Radio Frequency (Rf) Shielding
Patent:
8,008,753 →
Application:
12/107,478 →
Semiconductor Device Having Reduced Thermal Interface Material (Tim) Degradation and Method Therefor
Patent:
7,906,845 →
Application:
12/108,419 →
Lead Free Alloy Bump Structure and Fabrication Method
Patent:
7,994,043 →
Application:
12/108,909 →
Semiconductor Package with Half-Etched Locking Features
Patent:
7,808,084 →
Application:
12/116,127 →
Semiconductor Device Having Redistribution Layer
Patent:
8,058,726 →
Application:
12/116,695 →
Flip Chip Bump Structure and Fabrication Method
Patent:
7,932,170 →
Application:
12/144,145 →
Semiconductor Device Having Improved Contact Interface Reliability and Method Therefor
Patent:
7,944,043 →
Application:
12/169,151 →
Increased I/O Semiconductor Package and Method of Making Same
Patent:
8,125,064 →
Application:
12/181,256 →
Increased Capacity Semiconductor Package
Patent:
8,184,453 →
Application:
12/183,979 →
Land Patterns for a Semiconductor Stacking Structure and Method Therefor
Patent:
7,691,745 →
Application:
12/187,578 →
Semiconductor Package Having Through Holes
Patent:
7,843,072 →
Application:
12/190,039 →
Two-Sided Fan-Out Wafer Escape Package
Patent:
7,692,286 →
Application:
12/221,797 →
Camera Module with Window Mechanical Attachment
Ultra Thin Package and Fabrication Method
Patent:
7,842,541 →
Application:
12/237,173 →
Semiconductor Device Including Leadframe with Increased I/O
Patent:
7,847,392 →
Application:
12/242,603 →
Increased I/O Leadframe and Semiconductor Device Including Same
Patent:
7,989,933 →
Application:
12/246,226 →
Semiconductor Device with Increased I/O Leadframe
Patent:
8,008,758 →
Application:
12/259,096 →
Package Failure Prognostic Structure and Method
Patent:
8,022,521 →
Application:
12/269,357 →
Semiconductor Devices and Fabrication Methods Thereof
Patent:
7,843,052 →
Application:
12/270,690 →
Semiconductor Device Including Increased Capacity Leadframe
Patent:
8,089,145 →
Application:
12/272,606 →
Semiconductor Device with Increased I/O Leadframe Including Passive Device
Patent:
8,072,050 →
Application:
12/273,500 →
Semiconductor Device Including Leadframe Having Power Bars and Increased I/O
Patent:
7,875,963 →
Application:
12/276,121 →
Stackable Semiconductor Package
Patent:
7,737,542 →
Application:
12/291,119 →
Stacked Flip Chip Die Assembly
Patent:
7,859,119 →
Application:
12/291,767 →
Adhesive on Wire Stacked Semiconductor Package
System and Method to Provide Rf Shielding for a Mems Microphone Package
Shielding for a Semiconductor Package
Patent:
8,129,824 →
Application:
12/327,716 →
Package in Package Semiconductor Device
Patent:
7,982,298 →
Application:
12/327,763 →
System and Method for Compartmental Shielding of Stacked Packages
Patent:
8,102,032 →
Application:
12/330,769 →
Semiconductor Device Having Emi Shielding and Method Therefor
Patent:
8,012,868 →
Application:
12/335,365 →
Semiconductor Package Having a Heat Spreader with an Exposed Exterior Surface and a Top Mold Gate
Patent:
8,018,072 →
Application:
12/342,386 →
System and Method for Shielding of Package on Package (Pop) Assemblies
Patent:
7,851,894 →
Application:
12/342,829 →
Protruding Post Substrate Package Structure and Method
Patent:
8,176,628 →
Application:
12/342,839 →
Micro-Optical Device Packaging System
Package in Package Device for Rf Transceiver Module
Patent:
8,058,715 →
Application:
12/351,690 →
Etch Singulated Semiconductor Package
Patent:
7,732,899 →
Application:
12/365,682 →
Stacked Redistribution Layer (Rdl) Die Assembly Package
Patent:
7,825,520 →
Application:
12/387,672 →
Reduced Profile Stackable Semiconductor Package
Patent:
8,026,589 →
Application:
12/390,999 →
Semiconductor Device
Patent:
7,872,341 →
Application:
12/396,772 →
Reversible Top/Bottom Mems Package
Patent:
8,030,722 →
Application:
12/397,470 →
Conformal Shield on Punch Qfn Semiconductor Package
Patent:
7,960,818 →
Application:
12/398,089 →
Leadframe for Semiconductor Package
Adhesive Composition for Semiconductor Device
Patent:
8,004,078 →
Application:
12/405,854 →
Thermal via Heat Spreader Package and Method
Patent:
7,960,827 →
Application:
12/421,118 →
Wire Bonder for Improved Bondability of a Conductive Wire and Method Therefor
Patent:
7,938,308 →
Application:
12/429,448 →
Embedded Electronic Component Package Fabrication Method
Patent:
7,977,163 →
Application:
12/459,532 →
Direct Glass Attached on Die Optical Module
Patent:
7,911,017 →
Application:
12/459,536 →
Method and Structure for Creating Embedded Metal Features
Patent:
7,911,037 →
Application:
12/462,665 →
System and Method for Testing Radio Frequency (Rf) Shielding Defects
Patent:
7,839,136 →
Application:
12/481,525 →
System and Method for Rf Shielding of a Semiconductor Package
Patent:
8,093,691 →
Application:
12/502,409 →
Reversible Top/Bottom Mems Package
Patent:
8,115,283 →
Application:
12/502,627 →
Semiconductor Device Having an Interposer
Circuit Board and Semiconductor Device Having the Same
Patent:
8,089,148 →
Application:
12/539,116 →
Semiconductor Device and Fabricating Method Thereof
Patent:
8,183,683 →
Application:
12/549,068 →
Wafer Level Chip Size Package Having Redistribution Layers
Patent:
7,977,783 →
Application:
12/549,083 →
Bumped Chip Package Fabrication Method and Structure
Patent:
7,994,045 →
Application:
12/555,449 →
Semiconductor Package Including a Top-Surface Metal Layer for Implementing Circuit Features
Patent:
8,018,068 →
Application:
12/589,839 →
Method of Making Semiconductor Package with Adhering Portion
Patent:
8,129,849 →
Application:
12/589,868 →
Semiconductor Package Including Top-Surface Terminals for Mounting Another Semiconductor Package
Patent:
8,110,909 →
Application:
12/655,724 →
Stacked Electronic Component Package Having Film-on-Wire Spacer
Patent:
8,072,083 →
Application:
12/657,425 →
Direct-Write Wafer Level Chip Scale Package
Patent:
8,188,584 →
Application:
12/661,597 →
Electronic Component Package Comprising Fan-Out Traces
Patent:
7,932,595 →
Application:
12/661,604 →
Semiconductor Package Having Leadframe with Exposed Anchor Pads
Patent:
8,089,141 →
Application:
12/693,372 →
Dual Laminate Package Structure with Embedded Elements
Patent:
7,872,343 →
Application:
12/699,739 →
Heat Spreader Package and Method
Patent:
7,999,371 →
Application:
12/702,505 →
Stacked Semiconductor Package and Method of Making Same
Patent:
7,906,855 →
Application:
12/758,583 →
Solder Attach Film and Assembly
Patent:
7,859,107 →
Application:
12/798,412 →
Stackable Semiconductor Package
Patent:
7,982,306 →
Application:
12/799,751 →
Semiconductor Package Including Top-Surface Terminals for Mounting Another Semiconductor Package
Patent:
8,026,587 →
Application:
12/802,661 →
Semiconductor Package with Fast Power-Up Cycle and Method of Making Same
Patent:
8,084,868 →
Application:
12/818,446 →
Adhesive on Wire Stacked Semiconductor Package
Semiconductor Device Including Leadframe Having Power Bars and Increased I/O
Patent:
8,188,579 →
Application:
12/965,582 →
Leadframe for Semiconductor Package
Wafer Level Package Fabrication Method
Patent:
8,119,455 →
Application:
13/065,296 →
Related Assignments
(2)
Other recorded transfers of the patents in this record — the chain of ownership.