Semiconductor package having a plurality input/output members

1. A semiconductor package comprising:

a first substrate having electrically conductive patterns on at least a first surface thereof;

a first semiconductor die having an active surface electrically coupled to the electrically conductive patterns on the first substrate;

a second semiconductor die having an inactive surface coupled to an inactive surface of the first semiconductor die;

a second substrate having electrically conductive patterns on at least a first surface thereof, an active surface of the second semiconductor die electrically coupled to the electrically conductive patterns on the second substrate;

a plurality of contacts attached to the first substrate; and

a connector jack electrically coupled to the second substrate;

wherein the first substrate is electrically isolated from the second substrate so that electrical signals are transmitted from the first semiconductor die to an external device only through the plurality of connectors and electrical signals transmitted from the second semiconductor die to the external device only through the connector jack.

2. The semiconductor package according to claim 1 , wherein the inactive surface of the second semiconductor die is coupled to the inactive surface of the first semiconductor die with a die attach material.

3. The semiconductor package according to claim 1 , further comprising a first underfill to fill a space between the first substrate and the active surface of the first semiconductor die.

4. The semiconductor package according to claim 3 , further comprising a second underfill to fill a space between the second substrate and the active surface of the second semiconductor die.

5. The semiconductor package according to claim 1 , further comprising:

a plurality of bond pads on the active surface of the first semiconductor die;

a plating layer formed on a bottom area of each of the plurality of bond pads; and

a plurality of electrically conductive bumps fused to the plating layer.

6. The semiconductor package according to claim 1 , wherein the connector jack comprises:

a flexible substrate having flexible electrically-conductive patterns, a first end of the flexible electrically-conductive patterns coupled to the electrically conductive patterns of the second substrate; and

a jack coupled to a second end of the flexible electrically-conductive patterns.

7. The semiconductor package according to claim 6 , wherein the connector jack further comprises:

an insulative layer; and

a protective layer, the flexible electrically-conductive patterns positioned in between the insulative layer and the protective layer.

8. The semiconductor package according to claim 1 , further comprising:

a plurality of bond pads on an active surface of the second semiconductor die;

a plating layer formed on a bottom area of each of the plurality of bond pads; and

a plurality of electrically conductive bumps fused to the plating layer.

9. The semiconductor package according to claim 1 , further comprising a third semiconductor die coupled to the second semiconductor die and the first semiconductor die.

10. The semiconductor package according to claim 9 , further comprising a plurality of leads electrically coupled to an active surface of the third semiconductor die.

11. The semiconductor package according to claim 10 , further comprising an encapsulant for encapsulating the first and second substrates, the first, second and third semiconductor dies, and the plurality of leads.

12. The semiconductor package according to claim 10 , wherein the plurality of leads protrudes out and extends away from the semiconductor package.

13. The semiconductor package according to claim 10 , wherein a bottom surface of each of the plurality of leads is approximately co-planer with a bottom surface of the semiconductor package.

14. A semiconductor package comprising:

a first substrate having a first set of electrically conductive patterns on at least a first surface thereof;

a first semiconductor die having an active surface coupled to the electrically conductive patterns on the first substrate;

a second semiconductor die having an inactive surface coupled to an inactive surface of the first semiconductor die;

a second substrate having a second set of electrically conductive patterns on least a first surface thereof, an active surface of the second semiconductor die coupled to the electrically conductive patterns on the second substrate;

first means coupled to the first substrate for transferring signals to and from an external device; and

second means coupled to the second substrate for transferring signals to and from the external device;

wherein the first substrate is electrically isolated from the second substrate so that electrical signals are transmitted from the first semiconductor die to an external device only through the plurality of connectors and electrical signals transmitted from the second semiconductor die to the external device only through the connector jack.

15. The semiconductor package according to claim 14 , wherein the second means are a connector jack coupled to the second substrate contacts.

16. The semiconductor package according to claim 14 , further comprising a first means for filling a space between the first substrate and the first semiconductor die.

17. The semiconductor package according to claim 14 , further comprising a second means for filling a space between the second substrate and the second semiconductor die.

18. The semiconductor package according to claim 14 , further comprising a third semiconductor die coupled to the second semiconductor die and the first semiconductor die.

19. The semiconductor package according to claim 9 , further comprising a plurality of leads electrically coupled to an active surface of the third semiconductor die.

20. The semiconductor package according to claim 10 , further comprising an encapsulant for encapsulating the first and second substrates, the first, second and third semiconductor dies, and the plurality of leads.