Semiconductor device having an interposer
View Patent ↗A semiconductor device and a method of fabricating the same. An interposer used for the semiconductor device includes integrated circuits therein to realize the functions of a decoupling capacitor, an ESD preventing circuit, an impedance matching circuit, and termination. The semiconductor device may include a semiconductor die with a through silicon via (TSV) structure having two or more through electrodes that pass through the semiconductor die, in which each of the through electrodes are connected to a respective bond pad of the semiconductor die.
1. A semiconductor device, comprising:
a substrate including lands provided on the lower surface thereof and conductive patterns electrically connected to the lands thereon;
a semiconductor die formed on the substrate and electrically connected to the conductive patterns, wherein the semiconductor die has a through silicon via (TSV) structure comprising a plurality of through electrodes that pass through the semiconductor die, each of the plurality of through electrodes being connected to a respective bond pad of the semiconductor die;
an interposer formed on one of the substrate and the semiconductor die and the interposer including at least one integrated circuit connected to the semiconductor die therein; and
an encapsulant formed on the substrate to surround the semiconductor die and the interposer.
2. The semiconductor device of claim 1 , wherein the semiconductor die is formed such that the bond pads are in one of an upward facing orientation and a downward facing orientation.
3. The semiconductor device of claim 1 , wherein the integrated circuit of the interposer is formed of one selected from the group consisting of a decoupling capacitor, an electrostatic discharge (ESD) protecting circuit, an impedance matching circuit, and a termination circuit or a combination of above circuits.
4. The semiconductor device of claim 1 , wherein a plurality of integrated circuits of the interposer are selectively connected to the semiconductor die.
5. The semiconductor device of claim 1 , wherein the interposer comprises:
a first region formed on the interposer;
a second region formed under the interposer; and
a conductive via connected to the integrated circuit to electrically connect the first region and the second region to each other through the interposer.
6. The semiconductor device of claim 5 , wherein the first region and the second region are selectively connected to one of the substrate and the semiconductor die through wiring lines.
7. The semiconductor device of claim 6 , wherein the wiring lines are made of one of wires and fuses.
8. The semiconductor device of claim 1 , wherein an additional semiconductor die is stacked on the interposer.
9. The semiconductor device of claim 8 , wherein the stacked semiconductor die is formed such that the bond pads are in one of an upward facing orientation and a downward facing orientation.
10. The semiconductor device of claim 1 , further comprising side interposers electrically connected to the semiconductor die and/or interposer and formed on sides of the semiconductor die and/or interposer.
11. The semiconductor device of claim 10 ,
wherein at least one conductive via is exposed to sides to be electrically connected to the side interposer.
12. The semiconductor device of claim 10 , wherein, in the interposer, at least one conductive via is exposed to sides to be electrically connected to the side interposers.
13. The semiconductor device of claim 1 , further comprising passive elements formed on and/or under the interposer.