Method of fabricating an embedded circuit pattern

1. A method of fabricating a substrate comprising:

forming a first conductive layer on a dielectric layer;

forming a resist layer on the first conductive layer;

forming laser-ablated artifacts through the first resist layer, through the first conductive layer, and at least partially into the dielectric layer, wherein the first conductive layer is exposed within the laser-ablated artifacts;

forming a second conductive layer on the resist layer and within the laser-ablated artifacts, the second conductive layer being electrically coupled to the first conductive layer;

selectively removing a portion of the second conductive layer such that the second conductive layer remains only within the laser-ablated artifacts;

subsequent to the selectively removing a portion of the second conductive layer, filling the laser-ablated artifacts to form an overfilled circuit pattern;

removing the resist layer; and

selectively removing the first conductive layer and a portion of the overfilled circuit pattern to form an embedded circuit pattern, the embedded circuit pattern being embedded within the dielectric layer.

2. The method of claim 1

wherein the overfilled circuit pattern comprises the second conductive layer and an electrically conductive filler material; and

wherein the overfilled circuit pattern protrudes through the first conductive layer to a height above the first conductive layer.

3. The method of claim 1 wherein the laser-ablated artifacts include a laser-ablated channel.

4. The method of claim 3 wherein the laser-ablated channel extends in a direction parallel with a first surface of the substrate.

5. The method of claim 3 wherein the laser-ablated channel is defined by a channel base and a channel sidewall, the channel base being between a first surface of the dielectric layer and a second surface of the dielectric layer, the channel sidewall extending between the channel base and a first surface of the substrate.

6. The method of claim 1 wherein the laser-ablated artifacts include a laser-ablated land opening.

7. The method of claim 6 wherein the laser-ablated land opening is defined by a land opening base and a land opening sidewall, the land opening base being between a first surface of the dielectric layer and a second surface of the dielectric layer, the land opening sidewall extending between the land opening base and a first surface of the substrate.

8. The method of claim 1 wherein the laser-ablated artifacts include a laser-ablated via opening.

9. The method of claim 8 wherein the laser-ablated via opening is defined by a via opening sidewall extending between a first surface and a second surface of the substrate.

10. The method of claim 1 wherein the filling the laser-ablated artifacts is performed using an electroplating process in which the first conductive layer and the second conductive layer are collectively used as an electroplating electrode.

11. The method of claim 10 wherein the laser-ablated artifacts are not overplated during the filling the laser-ablated artifacts.

12. The method of claim 1

wherein the laser-ablated artifacts comprising a laser-ablated channel defined by a channel base and a channel sidewall, the channel base being between a first surface of the dielectric layer and a second surface of the dielectric layer, the channel sidewall extending between the channel base and a first surface of the substrate,

wherein the overfilled circuit pattern protrudes through the first conductive layer to a height above the first conductive layer.

13. The method of claim 12 wherein the embedded circuit pattern comprises a trace within the laser-ablated channel, the trace comprising a trace base and a trace sidewall, the trace base being between the first surface of the dielectric layer and the second surface of the dielectric layer, the trace sidewall extending between the trace base and the first surface of the dielectric layer.