Methods of forming solder bumps on exposed metal pads

1. A method of forming an electronic structure, the method comprising:

providing a substrate having a metal pad thereon and an insulating layer surrounding the metal pad;

forming a conductive barrier layer on a first portion of the metal pad, wherein a second exposed portion of the metal pad is free of the conductive barrier layer and free of the insulating layer; and

providing an interconnection structure on the conductive barrier layer, wherein the conductive barrier layer is between the interconnection structure and the metal pad and wherein the interconnection structure and the conductive barrier layer include different materials.

2. A method of forming an electronic structure according to claim 1 wherein forming the conductive barrier layer comprises,

forming a conductive seed layer on the metal pad and on the insulating layer,

selectively forming the conductive barrier layer on a portion of the conductive seed layer on the first portion of the metal pad so that a second portion of the seed layer on the second portion of the metal pad is free of the conductive barrier layer, and

after selectively forming the conductive barrier layer, removing the second portion of the seed layer from the second portion of the metal pad.

3. A method according to claim 2 wherein removing the second portion of the seed layer comprises etching the second portion of the seed layer using an etch chemistry that etches at least a portion of the conductive seed layer preferentially with respect to the conductive barrier layer and the metal pad.

4. A method according to claim 1 wherein the exposed second portion of the metal pad surrounds the conductive barrier layer.

5. A method according to claim 1 wherein a portion of the conductive barrier layer extends beyond an edge of the metal pad.

6. A method according to claim 1 wherein the insulating layer extends on an edge portion of the metal pad opposite the substrate so that the second portion of the metal pad is exposed between the conductive barrier layer and the insulating layer.

7. A method according to claim 1 wherein a portion of the conductive barrier layer extends on a portion of the insulating layer.

8. A method according to claim 1 wherein a center of the conductive barrier layer is substantially aligned with respect to a center of the metal pad.

9. A method according to claim 1 wherein a center of the conductive barrier layer is substantially offset with respect to a center of the metal pad.

10. A method according to claim 1 further comprising:

providing a second metal pad on the substrate, wherein the first and second metal pads are spaced apart; and

forming a second conductive barrier layer on a portion of the second metal pad, wherein an alignment of the first conductive barrier layer relative to the first metal pad is different than an alignment of the second conductive barrier layer relative to the second metal pad.

11. A method according to claim 10 wherein the first conductive barrier layer is substantially aligned relative to the first metal pad and wherein the second conductive barrier layer is substantially offset relative to the second metal pad.

12. A method according to claim 10 wherein the first conductive barrier layer is substantially offset in a first direction relative to the first metal pad and wherein the second conductive barrier layer is substantially offset in a second direction relative to the second metal pad and wherein the first and second directions are different.

13. A method according to claim 1 wherein the interconnection structure includes a solder bump and/or a copper post.

14. A method according to claim 1 wherein the metal pad includes aluminum, copper, gold, and/or alloys thereof, wherein the conductive barrier layer includes nickel, copper, and/or alloys thereof, and wherein the interconnection structure includes solder and/or copper.

15. A method according to claim 1 wherein the metal pad includes aluminum and the conductive barrier layer includes nickel.

16. A method according to claim 1 wherein at least a portion of the metal pad is on a portion of the insulating layer so that a surface of the metal pad opposite the substrate is free of the insulating layer.

17. A method of forming an electronic structure, the method comprising:

providing a substrate having a metal pad thereon;

forming an underbump metallurgy layer on a surface of the metal pad wherein the metal pad is between the underbump metallurgy layer and the substrate;

forming a conductive barrier layer on the underbump metallurgy layer wherein the underbump metallurgy layer is between the conductive barrier layer and the metal pad, wherein an entirety of the underbump metallurgy layer and the conductive barrier layer is directly on and conformal with respect to the surface of the metal pad, and wherein the conductive barrier layer and the underbump metallurgy layers comprise different materials; and

forming a solder bump on the conductive barrier layer wherein the conductive barrier layer is between the solder bump and the underbump metallurgy layer, and wherein the conductive barrier layer and the solder bump comprise different materials.

18. A method of forming an electronic structure, the method comprising:

providing a substrate having a metal pad thereon and an insulating layer surrounding the metal pad;

forming an underbump metallurgy layer on a surface of the metal pad wherein the metal pad is between the underbump metallurgy layer and the substrate;

forming a conductive barrier layer on the underbump metallurgy layer wherein the underbump metallurgy layer is between the conductive barrier layer and the metal pad, and wherein the conductive barrier layer and the underbump metallurgy layer comprise different materials; and

forming a solder bump on the conductive barrier layer wherein the conductive barrier layer is between the solder bump and the underbump metallurgy layer, wherein the conductive barrier layer and the solder bump comprise different materials, and wherein a portion of the metal pad is free of the insulating layer, the underbump metallurgy layer, the conductive barrier layer, and the solder bump.

19. A method according to claim 1 wherein portions of the metal pad extend beyond portions of the conductive barrier layer in a direction parallel to a surface of the substrate.

20. A method according to claim 17 wherein portions of the metal pad extend beyond portions of the conductive barrier layer in a direction parallel to a surface of the substrate.

21. A method according to claim 18 wherein portions of the metal pad extend beyond portions of the conductive barrier layer in a direction parallel to a surface of the substrate.

22. A method according to claim 17 wherein forming the under bump metallurgy layer comprises,

before forming the conductive barrier layer, forming the under bump metallurgy layer on the metal pad, and

after forming the conductive barrier layer, removing portions of the under bump metallurgy layer that are free of the conductive barrier layer.

23. A method according to claim 17 wherein forming the conductive barrier layer comprises selectively forming the conductive barrier layer on a portion of the under bump metallurgy layer on a first portion of the metal pad so that a second portion of the under bump metallurgy layer on a second portion of the metal pad is free of the conductive barrier layer, the method further comprising:

after selectively forming the conductive barrier layer, removing the second portion of the under bump metallurgy layer from the second portion of the metal pad so that the second portion of the metal pad is exposed.

24. A method according to claim 23 wherein removing the second portion of the under bump metallurgy layer comprises etching the second portion of the under bump metallurgy layer using an etch chemistry that etches at least a portion of the under bump metallurgy layer preferentially with respect to the conductive barrier layer and the metal pad.

25. A method according to claim 18 wherein forming the under bump metallurgy layer comprises, before forming the conductive barrier layer, forming the under bump metallurgy layer on the metal pad and on the insulating layer, and

after forming the conductive barrier layer, removing portions of the under bump metallurgy layer that are free of the conductive barrier layer.

26. A method according to claim 18 wherein forming the conductive barrier layer comprises selectively forming the conductive barrier layer on a portion of the under bump metallurgy layer on a first portion of the metal pad so that a second portion of the under bump metallurgy layer on a second portion of the metal pad is free of the conductive barrier layer, the method further comprising:

after selectively forming the conductive barrier layer, removing the second portion of the under bump metallurgy layer from the second portion of the metal pad so that the second portion of the metal pad is exposed.

27. A method according to claim 26 wherein removing the second portion of the under bump metallurgy layer comprises etching the second portion of the under bump metallurgy layer using an etch chemistry that etches at least a portion of the under bump metallurgy layer preferentially with respect to the conductive barrier layer and the metal pad.

28. A method according to claim 18 wherein a center of the conductive barrier layer is substantially offset with respect to a center of the metal pad.

29. A method according to claim 18 further comprising:

providing a second metal pad on the substrate, wherein the first and second metal pads are spaced apart; and

forming a second conductive barrier layer on a portion of the second metal pad, wherein an alignment of the first conductive barrier layer relative to the first metal pad is different than an alignment of the second conductive barrier layer relative to the second metal pad.

30. A method according to claim 29 wherein the first conductive barrier layer is substantially aligned relative to the first metal pad and wherein the second conductive barrier layer is substantially offset relative to the second metal pad.

31. A method according to claim 29 wherein the first conductive barrier layer is substantially offset in a first direction relative to the first metal pad and wherein the second conductive barrier layer is substantially offset in a second direction relative to the second metal pad and wherein the first and second directions are different.