IP Library Granted Patent US 7,035,318
Granted Patent B2
US 7,035,318 · App. 10/105,191 · Granted Apr 25, 2006

Receiving unit and semiconductor device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,035,318
App. No.
10/105,191
Granted
Apr 25, 2006
Kind
B2
Abstract

A receiving unit for receiving a CDMA system signal having a plurality of multipath components is intended to reduce the size. A receiving section receives a CDMA system signal. A storage section stores the signal received by the receiving section. A demodulation section demodulates each of multipath components included in the received signal stored in the storage section with a despreading code. A control section controls for demodulating a plurality of the multipath components by causing the demodulation section to perform a time division multiplex process. A Rake combining section performs the maximal ratio combining of output from the demodulation section to generate a demodulated signal.

Claims (16)

1. A receiving unit for receiving a CDMA system signal having a plurality of multipath components, the receiving unit comprising:

a receiving section for receiving a CDMA system signal;

a storage section for storing the signal received by the receiving section;

a demodulation section for demodulating each of multipath components included in the received signal stored in the storage section with a despreading code;

a control section to provide control for demodulating a plurality of the multipath components by causing the demodulation section to perform a time division multiplex process; and

a Rake combining section for performing the maximal ratio combining of output from the demodulation section to generate a demodulated signal,

wherein the demodulation section divides the timing with which the signal is read from the storage section into 2N time slots, assigns N of the 2N time slots to an ordinary despreading process, and assigns the remaining N time slots to a despreading process for preventing a symbol from being lost at the time of the variation in the timing of the received signal.

2. The receiving unit according to claim 1 , wherein the demodulation section performs an M-fold multiplex process by setting the rate at which the signal is read from the storage section to N×M (M is a multiple of L), if the rate at which the signal is written into the storage section is given by N (=the speed of the received signal)×L (=the number of folds for oversampling).

3. A semiconductor device for processing CDMA system signals having a plurality of multipath components, the semiconductor device comprising:

a receiving section for receiving a CDMA system signal;

a storage section for storing the signal received by the receiving section;

a demodulation section for demodulating each of multipath components included in the CDMA system signal stored in the storage section with a despreading code;

a control section to provide control for demodulating a plurality of the multipath components by causing the demodulation section to perform a time division multiplex process; and

a Rake combining section for performing the maximal ratio combining of output from the demodulation section to generate a demodulated signal,

wherein the demodulation section divides the timing with which the signal is read from the storage section into 2N time slots, assigns N of the 2N time slots to an ordinary despreading process, and assigns the remaining N time slots to a despreading process for preventing a symbol from being lost at the time of variation in the timing of the received signal.

4. The semiconductor device according to claim 3 , wherein the demodulation section performs an M-fold multiplex process by setting the rate at which the signal is read from the storage section to N×M (M is multiple of L), if the rate at which the signal is written into the storage section is given by N (=the speed of the received signal)×L (=the number of folds for oversampling).

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035507/0851 →
CHANGE OF NAME Recorded Jul 27, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024794/0500 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 10, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021985/0715 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2002
From: TANIGUCHI, SHOJI; KUROIWA, KOICHI; KANASUGI, MASAMI; YAMADA, YOSHIKAZU; HIKITA, MAHIRO
To: FUJITSU LIMITED
Reel/Frame 012731/0803 →