Encapsulation method and leadframe for leadless semiconductor packages
View Patent ↗An encapsulation technique for leadless semiconductor packages entails: (a) attaching a plurality of dice ( 411 ) to die pads in cavities ( 41-45, 51-55 ) of a leadframe, the cavities arranged in a matrix of columns and rows; (b) electrically connecting the dice to a plurality of conducting portions ( 412-414 ) of the leadframe; and (c) longitudinally injecting molding material into the cavities along the columns via a plurality of longitudinal gates ( 46-49, 56-59 ) of the leadframe to package the dice in the cavities, the longitudinal gates situated between the cavities along the columns.
1. A leadframe for leadless semiconductor packages, the leadframe comprising:
a plurality of cavities wherein each of said cavities is connected to an adjacent cavity in the same column by a longitudinal gate and also connected to an adjacent cavity in the same row by a transverse gate and wherein each gate is connected separately to a corresponding cavity, each cavity having (a) at least one die pad for supporting at least one die and (b) a plurality of conducting portions for electrical connection to the at least one die, the cavities arranged in a matrix of columns and rows;
a first gate connected to a first cavity for introducing a molding compound into said first cavity;
a second gate connecting said first cavity to a second cavity, for flowing said molding compound into said second cavity from said first cavity; and
a third gate connecting said first cavity to a third cavity, for flowing said molding compound into said third cavity from said first cavity.
2. The leadframe of claim 1 , wherein said first gate it a longitudinal gate, said second gate is a longitudinal gate and said third gate is a transverse gate.
3. The leadframe of claim 1 , wherein said first gate is a longitudinal gate, said second gate is a transverse gate and said third gate is a transverse gate.
4. The leadframe of claim 1 , further comprising a longitudinal fourth gate connecting said first cavity to a fourth cavity.
5. A leadframe for leadless semiconductor packages, the leadframe comprising:
a plurality of cavities wherein each of said cavities is connected to an adjacent cavity in the same column by a longitudinal gate and also connected to an adjacent cavity in the same row by a transverse gate and wherein each gate is connected separately to a corresponding cavity, each cavity having (a) at least one die pad for supporting at least one die and (b) a plurality of conducting portions for electrical connection to the at least one die, the cavities arranged in a matrix of columns and rows;
a first gate connecting a first cavity to a second cavity;
a second gate connecting said first cavity to a third cavity; and
a third gate connecting said first cavity to a fourth cavity.
6. The leadframe of claim 5 , wherein said first and second gates are transverse gates and said third gate is a longitudinal gate.
7. The leadframe of claim 5 , wherein said first and second gates are longitudinal gates and said third gate is a traverse gate.