Granted Patent
Utility
US 6,537,885
· Confirmation No. 2067
TRANSISTOR AND METHOD OF MANUFACTURING A TRANSISTOR HAVING A SHALLOW JUNCTION FORMATION USING A TWO STEP EPI LAYER
Patented Case
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2002-05-09 | TRNA |
Transmittal of New Application | 2 | View | |
| 2002-05-09 | ADS |
Application Data Sheet | 3 | View | |
| 2002-05-09 | SPEC |
Specification | 8 | View | |
| 2002-05-09 | CLM |
Claims | 3 | View | |
| 2002-05-09 | ABST |
Abstract | 1 | View | |
| 2002-05-09 | DRW |
Drawings-only black and white line drawings | 2 | View | |
| 2002-05-09 | OATH |
Oath or Declaration filed | 3 | View |
Inventors
Woo-Tag Kang
Wappinger Falls, NY
Kil-Ho Lee
Wappinger Falls, NY
Classification
USPC
438/303
H10D30/0275
H10D30/608
Prosecution
- Examiner
- NGUYEN, THANH T
- Art Unit
- 2813
- Docket No.
- INTECH 3.0-030,01P16536US
- Confirmation No.
- 2067
Patent Term Adjustment
0days
No related applications found.
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2015-10-08
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2010-01-13
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2002-05-09
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Quick Facts
- Patent No.
- US 6,537,885
- App. No.
- 10/142,537
- Filed
- 2002-05-09
- Granted
- 2003-03-25
- Examiner
- NGUYEN, THANH T
- Art Unit
- 2813
- PTA
- 0 days
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