IP Library Granted Patent US 6,537,885
Granted Patent Utility
US 6,537,885 · Confirmation No. 2067

TRANSISTOR AND METHOD OF MANUFACTURING A TRANSISTOR HAVING A SHALLOW JUNCTION FORMATION USING A TWO STEP EPI LAYER

Inventors: Woo-Tag Kang, Kil-Ho Lee
Patented Case View Patent ↗
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Code Description Pages PDF
2002-05-09 TRNA Transmittal of New Application 2 View
2002-05-09 ADS Application Data Sheet 3 View
2002-05-09 SPEC Specification 8 View
2002-05-09 CLM Claims 3 View
2002-05-09 ABST Abstract 1 View
2002-05-09 DRW Drawings-only black and white line drawings 2 View
2002-05-09 OATH Oath or Declaration filed 3 View
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Quick Facts
Patent No.
US 6,537,885
App. No.
10/142,537
Filed
2002-05-09
Granted
2003-03-25
Art Unit
2813
PTA
0 days