Granted Patent
Utility
US 6,745,359
· Confirmation No. 8196
METHOD OF MASKING CORRUPT BITS DURING SIGNATURE ANALYSIS AND CIRCUIT FOR USE THEREWITH
Inventor:
Benoit Nadeau-Dostie
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2004-03-26 | IFEE |
Issue Fee Payment (PTO-85B) | 2 | View | |
| 2002-06-06 | TRNA |
Transmittal of New Application | 2 | View | |
| 2002-06-06 | SPEC |
Specification | 14 | View | |
| 2002-06-06 | CLM |
Claims | 9 | View | |
| 2002-06-06 | ABST |
Abstract | 1 | View | |
| 2002-06-06 | DRW |
Drawings-only black and white line drawings | 3 | View | |
| 2002-06-06 | OATH |
Oath or Declaration filed | 3 | View |
Inventors
Benoit Nadeau-Dostie
Aylmer, CANADA
Attorneys & Agents of Record
Classification
USPC
714/726
G01R31/318544
G01R31/318541
Prosecution
- Examiner
- CHASE, SHELLY A
- Art Unit
- 2133
- Customer No.
- 26668
- Docket No.
- LVPAT060US
- Confirmation No.
- 8196
Publication
- Pub. No.
- US20030229833A1
- Pub. Date
- 2003-12-11
Patent Term Adjustment
0days
MERGER AND CHANGE OF NAME
Recorded 2021-06-16
from
LOGICVISION, INC.
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2010-04-14
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Quick Facts
- Patent No.
- US 6,745,359
- App. No.
- 10/162,917
- Filed
- 2002-06-06
- Granted
- 2004-06-01
- Pub. No.
- US20030229833A1
- Examiner
- CHASE, SHELLY A
- Art Unit
- 2133
- PTA
- 0 days
External Links