IP Library Granted Patent US 6,642,145
Granted Patent Utility
US 6,642,145 · Confirmation No. 5192

METHOD OF MANUFACTURING AN INTEGRATED CIRCUIT WITH DIELECTRIC DIFFUSION BARRIER LAYER FORMED BETWEEN INTERCONNECTS AND INTERLAYER DIELECTRIC LAYERS

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2003-08-04 IFEE Issue Fee Payment (PTO-85B) 1 View
2003-08-04 LET. Miscellaneous Incoming Letter 2 View
2002-08-22 TRNA Transmittal of New Application 2 View
2002-08-22 ADS Application Data Sheet 2 View
2002-08-22 SPEC Specification 9 View
2002-08-22 CLM Claims 3 View
2002-08-22 ABST Abstract 1 View
2002-08-22 DRW Drawings-only black and white line drawings 2 View
2002-08-22 OATH Oath or Declaration filed 3 View
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Quick Facts
Patent No.
US 6,642,145
App. No.
10/226,520
Filed
2002-08-22
Granted
2003-11-04
Art Unit
2813
PTA
0 days