Dual source lithography for direct write application
View Patent ↗A dual exposure source lithography system forms a first and a second portion of a pattern on a wafer. An optical lithography module forms the first portion of the pattern. A non-optical lithography module forms the second portion of the pattern using a non-optical lithography exposure source. The non-optical exposure source is an electron beam lithography source, an EUV source, an x-ray source, or another next generation lithography system exposure source. A mask design file is decomposed into separate design files reflecting critical and non-critical components of the pattern to be formed on the wafer.
1. A dual source lithography system for forming a first and second component of a pattern on a wafer, one of the first and second components comprising critical components of a pattern and the other comprising non-critical components, the dual source lithography system comprising:
a first lithography exposure source for forming the first components of the pattern on a resist layer of the wafer;
a second lithography exposure source for forming the second components of the pattern on the resist layer of the wafer; and
a CPU configured to import a photomask design file and export at least two design files, a first design file having features with a level of detail finer than a predetermined threshold and a second design file having a level of detail equal to or coarser than a predetermined threshold.
2. The dual source lithography system recited in claim 1 wherein the second lithography exposure source is an optical lithography exposure source contained within an optical lithography module configured to form pattern features having a level of detail equal to or coarser than a predetermined threshold and the second design file is used in controlling the forming of the second components of the pattern.
3. The dual source lithography system recited in claim 2 wherein the first lithography exposure source is a non-optical lithography exposure source contained within a non-optical lithography module configured to form pattern features having a level of detail finer than a predetermined threshold and the first design file is used in controlling the forming of the first components of the pattern.
4. The dual source lithography system recited in claim 3 wherein the non-optical lithography module is an electron beam lithography module configured for direct writing of a pattern on a photoresist layer of the wafer.
5. The dual source lithography system recited in claim 3 , wherein the first lithography exposure source is one of an electron beam, x-ray, laser direct-write, e-beam with stencil mark, and extreme ultraviolet source.
6. The dual source lithography system recited in claim 5 , wherein the second lithography exposure source is an optical lithography source.
7. The dual source lithography system recited in claim 6 , further comprising an alignment module for aligning the wafer to the dual source lithography system.
8. The dual source lithography system recited in claim 7 , wherein the alignment module is coupled to the optical lithography source.
9. The dual source lithography system recited in claim 1 wherein the first lithography exposure source is a non-optical lithography exposure source contained within a non-optical lithography module configured to form pattern features having a level of detail finer than a predetermined threshold and the first design file is used in controlling the forming of the first components of the pattern.
10. The dual source lithography system recited in claim 1 , wherein the optical lithography system further comprises a focusing module for focusing the light projected from the optical lithography exposure source on the wafer.
11. The dual source lithography system recited in claim 1 , further comprising a chamber surrounding the first lithography exposure source.
12. The dual source lithography system recited in claim 11 , wherein the chamber is configured to provide a vacuum to the first lithography exposure source.
13. The dual source lithography system recited in claim 1 , wherein the first lithography exposure source is one of an electron beam direct-write lithography source.
14. The dual source lithography system recited in claim 13 wherein the electron beam lithography source is contained in an electron beam lithography module configured for direct writing of a pattern on a photoresist layer of the wafer.
15. The dual source lithography system recited in claim 1 , wherein the second lithography exposure source uses information contained within the second design file of the CPU to form pattern features having a level of detail equal to or coarser than a predetermined threshold.
16. The dual source lithography system recited in claim 15 , wherein the first lithography exposure source uses information contained within the first design file of the CPU to form pattern features having a level of detail finer than the predetermined threshold.
17. The dual source lithography system recited in claim 1 , wherein the first lithography exposure source uses information contained within the first design file of the CPU to form pattern features having a level of detail finer than a predetermined threshold.
18. The dual source lithography system recited in claim 1 , wherein the critical components comprise high-resolution features smaller in size than the resolution limit available from the second lithography exposure source.
19. A method of forming a pattern on a wafer, the method comprising:
providing a first design file that contains pattern information concerning critical components of the pattern enabling the formation of pattern features having a level of detail equal to or finer than a predetermined threshold;
providing a second design file that contains pattern information concerning non-critical components of the pattern enabling the formation of pattern features having a level of detail greater than the predetermined threshold;
forming the first critical components of a pattern on a resist layer of a wafer by exposing the resist layer of the wafer to an first lithography exposure source in accordance with the pattern information in the first design file; and
forming the second non-critical components of a pattern on the resist layer of the wafer by exposing the resist to a second lithography exposure source in accordance with the pattern information in the second design file.
20. The method of forming a pattern on a wafer as recited in claim 19 , wherein the first lithography exposure source is a non-optical exposure source.
21. The method of forming a pattern on a wafer as recited in claim 20 , wherein the second lithography exposure source is an optical exposure source.
22. The method of forming a pattern on a wafer as recited in claim 20 , wherein the non-optical exposure source is provided by an electron beam lithography module configured for direct writing of a pattern on a photoresist layer of the wafer.
23. The method of forming a pattern on a wafer as recited in claim 20 , wherein the resist layer is selected to be sensitive to both the first and second exposure sources.
24. The method of forming a pattern on a wafer as recited in claim 20 , wherein the resist layer is selected to be sensitive to both electron beam lithography and optical lithography.
25. The method of forming a pattern on a wafer as recited in claim 19 , wherein the non-optical exposure source is one of an electron beam, x-ray, laser direct-write and extreme ultraviolet source.
26. A dual source lithography system for forming a first and second component of a pattern on a wafer, first component comprising critical components of a pattern and the the second component comprising non-critical components, the dual source lithography system comprising:
a first lithography exposure source for forming the first components of the pattern on a resist layer of the wafer;
a second lithography exposure source for forming the second components of the pattern on the resist layer of the wafer; and
a CPU including a mask design decomposition system configured to import a photomask design file and export at least two component design files derived from the photomask design file, a first component design file that is associated with the critical components and is configured to pattern features having a level of detail finer than a predetermined threshold and a second component design file that is associated with the non-critical components and is configured to pattern features having a level of detail equal to or coarser than the predetermined threshold.
27. The dual source lithography system of claim 26 wherein the CPU mask design decomposition system enables the processing of the photomask design file such that a portion of the critical components of the photomask design file are reconfigured as non-critical components and are exported as part of the second design file associated with the non-critical components that are configured to pattern features having a level of detail equal to or coarser than the predetermined threshold.
28. The dual source lithography system of claim 26 wherein the second lithography exposure source is an optical lithography source.
29. The dual source lithography system of claim 28 wherein the predetermined threshold is defined by the resolution limit of the optical lithography source comprising the second lithography exposure source.
30. The dual source lithography system of claim 26 wherein the first lithography exposure source is a non-optical lithography source.
31. The dual source lithography system recited in claim 30 , wherein the first lithography exposure source is one of an electron beam source, an x-ray source, a laser direct-write source, an electron beam with stencil mark, and extreme ultraviolet source.