Circuit configuration for processing data, and method for identifying an operating state
View Patent ↗A circuit configuration for processing data, particularly a semiconductor memory chip, has a control circuit for setting a phase or frequency relationship between two signals. A digital counter detects a phase or frequency difference between the two signals, and the counter reading is used for regulating the phase or frequency relationship. Trials have shown that the counter reading indicates an operating state in the circuit configuration and therefore represents a simple signal for assessing the operating state of the circuit configuration. Preferably, the counter reading is taken as a basis for adjusting the speed or power of time-critical or performance-critical circuit parts in the circuit configuration so that an operating state with an intermediate switching speed is obtained.
1. In a circuit configuration for processing data, having a control circuit configured to set a phase or a frequency of a second signal with a prescribed phase or frequency relationship with respect to a first signal, said control circuit having a digital counter for detecting a phase or frequency difference between the first signal and the second signal, and said counter outputting a counter signal acting as a control signal of said control circuit for setting the phase or frequency of the second signal, the improvement which comprises:
an evaluation circuit connected to receive the counter signal and configured to assess an operating state of the circuit configuration on a basis of a counter reading, said circuit configuration having parts, and said evaluation circuit switching at least said parts to a changed operating mode on the basis of the counter signal; and
said parts affecting a clock frequency of the circuit configuration, and said evaluation circuit switching at least said parts affecting the clock frequency to a faster operating mode upon identification of a slow operating state in the circuit configuration.
2. In a circuit configuration for processing data, having a control circuit configured to set a phase or a frequency of a second signal with a prescribed phase or frequency relationship with respect to a first signal, said control circuit having a digital counter for detecting a phase or frequency difference between the first signal and the second signal, and said counter outputting a counter signal acting as a control signal of said control circuit for setting the phase or frequency of the second signal, the improvement which comprises:
an evaluation circuit connected to receive the counter signal and configured to assess an operating state of the circuit configuration on a basis of a counter reading, said circuit configuration having parts, and said evaluation circuit
switching at least said parts to a changed operating mode on the basis of the counter signal; and
said parts affecting a clock frequency of the circuit configuration, and said evaluation circuit switching at least said parts affecting the clock frequency to a slower operating mode upon identification of a fast operating state in the circuit configuration.
3. In a circuit configuration for processing data, having a control circuit configured to set a phase or a frequency of a second signal with a prescribed phase or frequency relationship with respect to a first signal, said control circuit having a digital counter for detecting a phase or frequency difference between the first signal and the second signal, and said counter outputting a counter signal acting as a control signal of said control circuit for setting the phase or frequency of the second signal, the improvement which comprises:
an evaluation circuit connected to receive the counter signal and configured to assess an operating state of the circuit configuration on a basis of a counter reading, said circuit configuration having parts, and said evaluation circuit switching at least said parts to a changed operating mode on the basis of the counter signal; and
at least one voltage generator, said voltage generator connected to said evaluation circuit, and said evaluation circuit switching said voltage generator to an operating state having a relatively low power consumption during which said voltage generator supplies less power following identification of a low-power operating mode in the circuit configuration.
4. In a circuit configuration for processing data, having a control circuit configured to set a phase or a frequency of a second signal with a prescribed phase or frequency relationship with respect to a first signal, said control circuit having a digital counter for detecting a phase or frequency difference between the first signal and the second signal, and said counter outputting a counter signal acting as a control signal of said control circuit for setting the phase or frequency of the second signal, the improvement which comprises:
an evaluation circuit connected to receive the counter signal and configured to assess an operating state of the circuit configuration on a basis of a counter reading, said circuit configuration having parts, and said evaluation circuit switching at least said parts to a changed operating mode on the basis of the counter signal;
a driver circuit, and said evaluation circuit changing a driver strength of said driver circuit on the basis of the counter signal.
5. In a circuit configuration for processing data, having a control circuit configured to set a phase or a frequency of a second signal with a prescribed phase or frequency relationship with respect to a first signal, said control circuit having a digital counter for detecting a phase or frequency difference between the first signal and the second signal, and said counter outputting a counter signal acting as a control signal of said control circuit for setting the phase or frequency of the second signal, the improvement which comprises:
an evaluation circuit connected to receive the counter signal and configured to assess an operating state of the circuit configuration on a basis of a counter reading;
a data memory connected to said evaluation circuit, said data memory storing limit values for the counter signal defining operating states of the circuit configuration;
said evaluation circuit ascertaining the operating state in the circuit configuration by comparing the counter signal with the stored limit values; and
wherein a frequency of the first signal is ascertained and supplied to said evaluation circuit;
said evaluation circuit is configured to take into account the counter reading and the frequency of the first signal when assessing the operating state of the circuit configuration; and
the limit values are defined on the basis of the frequency.
6. In a circuit configuration for processing data, having a control circuit configured to set a phase or a frequency of a second signal with a prescribed phase or frequency relationship with respect to a first signal, said control circuit having a digital counter for detecting a phase or frequency difference between the first signal and the second signal, and said counter outputting a counter signal acting as a control signal of said control circuit for setting the phase or frequency of the second signal, the improvement which comprises:
an evaluation circuit connected to receive the counter signal and configured to assess an operating state of the circuit configuration on a basis of a counter reading;
a data memory connected to said evaluation circuit, said data memory storing values of the counter signal corresponding to temperature ranges of the circuit configuration; and
said evaluation circuit identifying a temperature range for the circuit configuration by comparing the counter signal output by said counter with the stored values of the counter signal.
7. In a circuit configuration for processing data, having a control circuit configured to set a phase or a frequency of a second signal with a prescribed phase or frequency relationship with respect to a first signal, said control circuit having a digital counter for detecting a phase or frequency difference between the first signal and the second signal, and said counter outputting a counter signal acting as a control signal of said control circuit for setting the phase or frequency of the second signal, the improvement which comprises:
an evaluation circuit connected to receive the counter signal and configured to assess an operating state of the circuit configuration on a basis of a counter reading;
a data memory connected to said evaluation circuit, said data memory storing values of the counter signal corresponding to operating frequencies for the circuit configuration; and
said evaluation circuit identifying an operating frequency for the circuit configuration by comparing the counter signal output by said counter with the stored values of the counter signal.
8. The circuit configuration according to claim 1 formed on a semiconductor memory chip.