IP Library Granted Patent US 7,670,936
Granted Patent B1
US 7,670,936 · App. 10/273,184 · Granted Mar 2, 2010

Nitridation of gate oxide by laser processing

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Quick Facts
Patent No.
US 7,670,936
App. No.
10/273,184
Granted
Mar 2, 2010
Kind
B1
Abstract

A method of manufacturing a semiconductor device includes forming an interface layer, a nitrided gate dielectric, a gate electrode, and source drain regions. The interface layer is formed in a substrate by laser processing. The nitrided gate dielectric is formed over the interface layer by laser processing. The gate electrode is formed over the substrate and the gate dielectric after the laser processing step, and source/drain regions are formed in the substrate proximate to the gate electrode.

Claims (37)

1. A method of manufacturing a semiconductor device, comprising the steps of:

forming a nitrided gate dielectric over a substrate;

laser processing the gate dielectric;

forming a gate electrode over the substrate and the gate dielectric after the laser processing step; and

forming an interface layer in the substrate by laser processing before forming the gate dielectric,

wherein a surface of the interface layer is smoother than the surface of the substrate prior to forming the interface layer.

2. A method of manufacturing a semiconductor device, comprising the steps of:

forming a nitrided gate dielectric over a substrate;

laser processing the gate dielectric;

forming a gate electrode over the substrate and the gate dielectric after the laser processing step; and

forming an interface layer in the substrate by laser processing before forming the gate dielectric,

wherein the thickness of the interface layer is between about 10 and 200 angstroms.

3. A method of manufacturing a semiconductor device, comprising the steps of:

forming a nitrided gate dielectric over a substrate;

laser processing the gate dielectric; and

forming a gate electrode over the substrate and the gate dielectric after the laser processing step,

wherein the step of forming a nitrided gate dielectric includes forming a gate dielectric without nitrogen by plasma enhanced chemical vapor deposition, and laser thermal annealing the gate dielectric with nitrogen in a nitrogen-containing ambient.

4. A method of manufacturing a semiconductor device, comprising the steps of:

forming a nitrided gate dielectric over a substrate;

laser processing the gate dielectric; and

forming a gate electrode over the substrate and the gate dielectric after the laser processing step,

wherein the step of forming a nitrided gate dielectric includes forming a gate dielectric without nitrogen, and laser thermal annealing the gate dielectric with nitrogen in a nitrogen-containing ambient, and the nitrogen-containing ambient includes a gas selected from the group consisting of ammonium, nitric oxide, nitrous oxide, and combinations thereof.

5. A method of manufacturing a semiconductor device, comprising the steps of:

forming a nitrided gate dielectric over a substrate;

laser processing the gate dielectric; and

forming a gate electrode over the substrate and the gate dielectric after the laser processing step,

wherein the nitrided gate dielectric is formed by laser thermal oxidation in an ambient including nitrogen, and the ambient includes a gas selected from the group consisting of ammonium, nitric oxide, nitrous oxide, and combinations thereof.

6. A method of manufacturing a semiconductor device, comprising the steps of:

forming a nitrided gate dielectric over a substrate;

laser processing the gate dielectric; and

forming a gate electrode over the substrate and the gate dielectric after the laser processing step,

wherein the nitrided gate dielectric is formed by laser thermal oxidation in an ambient including nitrogen, and the ambient includes an oxidant selected from the group consisting of oxygen, steam, ozone, oxygen plasma, nitrous oxide, nitric oxide and combinations thereof.

7. A method of manufacturing a semiconductor device, comprising the steps of:

forming a nitrided gate dielectric over a substrate;

laser processing the gate dielectric; and

forming a gate electrode over the substrate and the gate dielectric after the laser processing step,

wherein during the laser processing step, certain portions of the semiconductor device are exposed to the laser processing step and other portions are not exposed.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
RELEASE OF SECURITY INTEREST Recorded May 7, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 049109/0573 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2019
From: CYPRESS SEMICONDUCTOR CORPORATION
To: LONGITUDE FLASH MEMORY SOLUTIONS LTD.
Reel/Frame 049086/0803 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036049/0581 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
SECURITY AGREEMENT Recorded Aug 23, 2012
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 028840/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 22, 2007
From: SPANSION INC.
To: SPANSION LLC
Reel/Frame 019052/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2007
From: ADVANCED MICRO DEVICES, INC.
To: SPANSION INC.
Reel/Frame 019029/0976 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2002
From: HALLIYAL, ARVIND; TRIPSAS, NICHOLAS; RAMSBEY, MARK T.
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 013413/0502 →