IP Library Granted Patent US 7,236,378
Granted Patent B2
US 7,236,378 · App. 10/295,710 · Granted Jun 26, 2007

Signal distribution to a plurality of circuit units

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Quick Facts
Patent No.
US 7,236,378
App. No.
10/295,710
Granted
Jun 26, 2007
Kind
B2
Abstract

A device for distributing a signal, in particular a clock signal or a command/address signal from a signal source to a plurality of circuit units, includes a transformer. The transformer has a primary winding receiving the signal from the signal source. Further, the transformer includes a plurality of secondary windings, which are arranged to interact with the primary winding to transfer the signal to the circuit units.

Claims (21)

1. A device for distributing a clock signal from a signal source to a plurality of circuit units, comprising: a transformer, said transformer including:

a primary winding receiving the clock signal from the signal source; and

a plurality of secondary windings arranged to interact with said primary winding to transmit the clock signal to the circuit units;

said plurality of secondary windings including a first secondary winding having a first terminal and a second terminal, and a second secondary winding having a first terminal and a second terminal, clock signal inputs of a first one of the circuit units being connected to said first terminal and said second terminal of said first secondary winding and clock signal inputs of a second one of the circuit units being connected to said first terminal and said second terminal of said second secondary winding.

2. The device in accordance with claim 1 , wherein a capacitor is connected in parallel to said primary winding.

3. The device in accordance with claim 1 , wherein the signal source is a clock-signal source including a phase-locked loop, and a further secondary winding is provided, which interacts with said primary winding to generate a feedback signal to the phase-locked loop.

4. The device in accordance with claim 1 , wherein said primary winding and said secondary winding are formed by conductive traces of a printed circuit.

5. The device in accordance with claim 4 , wherein the printed circuit includes a magnetic core for improving the magnetic coupling between said primary winding and said secondary windings.

6. The device in accordance with claim 4 , wherein the printed circuit includes several layers, and said primary windings and said secondary winding are arranged on the same layer or adjacent layers.

7. The device in accordance with claim 1 , wherein each secondary winding is connected to one of the circuit units via connection lines, and the arrangement of secondary winding and connection line for each circuit units includes an essentially identical topology.

8. The device in accordance with claim 1 , wherein the circuit units are memory chips.

9. The device in accordance with claim 1 , wherein the signal source is a clock-signal source or a command/address signal source.

10. The device in accordance with claim 1 , wherein said primary winding is arranged on a board and the said secondary windings are arranged on the circuit units.

11. The device in accordance with claim 1 , wherein at least a portion of each of said secondary windings is arranged opposite to a portion of said primary winding.

12. A device for distributing an information signal from a signal source to a plurality of circuit units, comprising:

a transformer, said transformer including:

a primary winding receiving the information signal from the signal source; and

a plurality of secondary windings arranged to interact with said primary winding to transmit the information signal to the circuit units,

said plurality of secondary windings including a first secondary winding having a first terminal and a second terminal, a second secondary winding having a first terminal and a second terminal, information signal inputs of a first one of the circuit units being connected to said first terminal and said second terminal of said first secondary winding and information signal inputs of a second one of the circuit units being connected to said first terminal and said second terminal of said second secondary winding.

13. The device in accordance with claim 12 , wherein the information signal is a command signal or an address signal.

14. The device in accordance with claim 12 , wherein the circuit units are memory chips.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 8, 2015
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 036818/0583 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2015
From: QIMONDA AG
To: INFINEON TECHNOLOGIES AG
Reel/Frame 035623/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2010
From: INFINEON TECHNOLOGIES AG
To: QIMONDA AG
Reel/Frame 023773/0457 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 23, 2007
From: KUZMENKA, MAKSIM
To: INFINEON TECHNOLOGIES AG
Reel/Frame 019194/0193 →