IP Library › Granted Patent US 6,941,427
Granted Patent B2
US 6,941,427 · App. 10/324,969 · Granted Sep 6, 2005

Method and apparatus for improving queue traversal time

Assignee: LSI Logic Corporation
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Quick Facts
Patent No.
US 6,941,427
App. No.
10/324,969
Granted
Sep 6, 2005
Kind
B2
Abstract

A method and apparatus for traversing a queue of commands through part or all of the queue by selecting only the commands that need to be reissued. Commands to be reissued are labeled or designated as valid. The method may be practiced by setting a next valid address pointer in all queue entries. Queue traversal may be forward, backward, or bi-directional.

Claims (20)

1. A method for traversing a queue, comprising:

issuing a command;

determining if the command needs to be reissued;

clearing a validity flag for the command if the command does not need to be reissued;

determining the location of the next command to be reissued; and

associating the location of the next command to be reissued with the command that needs to be reissued,

wherein the command that needs to be reissued and the next command to be reissued are stored in a queue;

in parallel with the clearing step, updating the queue whereby a current valid address pointer is maintained in each entry of the queue,

wherein the queue is updated by a next valid address logic which is independent from a queue processing logic,

wherein each entry in the queue includes a valid address pointer to a successor entry which has a valid address,

wherein a next valid address pointer for each entry of the queue of commands is calculated by the next valid address logic.

2. A method or traversing a queue, comprising:

determining if an entry in the queue needs to be accessed,

wherein each entry in the queue includes a valid address pointer to a successor entry which has a valid address;

setting a validity flag to a first state for the entry if the command needs to be accessed, otherwise setting the validity flag to a second state for the entry;

determining the location of the next queue entry to be accessed;

associating the location of the next queue entry to be accessed with the entry that needs to be accessed; and

updating the queue whereby a current valid address pointer is maintained in each entry of the queue of commands,

wherein the queue is updated by a next valid address logic which is independent from a queue processing logic,

wherein a next valid address pointer for each entry of the queue is calculated by the next valid address logic.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0097. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048555/0510 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0097 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
CHANGE OF NAME Recorded Jun 6, 2014
From: LSI LOGIC CORPORATION
To: LSI CORPORATION
Reel/Frame 033102/0270 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 20, 2002
From: SOLOMON, RICHARD L.; WARD, ROBERT E.; THOMAS, JILL A.
To: LSI LOGIC CORPORATION
Reel/Frame 013641/0972 →
Continuity (1)
Related Publication 20040123055A1 · Jun 24, 2004