Method and apparatus for controlling a data processing system during debug
A data processing system ( 10 ) includes a debug unit ( 14 ) that is capable of providing unobtrusive debug capabilities to the normal operation of the data processing system by controlling activation of all or a selected subset of a plurality of subsystems as needed for a debug operation. For example, power can be conserved by activating selected subsystems as needed for a debug operation. Furthermore, in one embodiment, the debug unit provides a level of activation, ranging from deactivation to full activation, to the selected subsystems which provides further control of the data processing system. In one embodiment, debug control and status registers ( 40 ) are provided for power management handshaking between the debug unit and the plurality of subsystems. The handshaking can be used to ensure that a debug operation may proceed properly since the selected subsystems are capable of providing status information to the debug unit.
1. A method for controlling a data processing system during a debug operation, the data processing system having a plurality of subsystems, the method comprising:
selecting selected ones of the plurality of subsystems which are to be activated during the debug operation;
controlling activation of the selected ones of the plurality of subsystems without changing an operating mode of the data processing system, wherein controlling activation comprises at least one of changing an attribute of a clock or initiating a change in power consumption;
providing activation status information from the selected ones of the plurality of subsystems; and
performing the debug operation.
2. A method as in claim 1 , further comprising:
releasing activation control of the selected ones of the plurality of subsystems.
3. A method as in claim 1 , further comprising:
determining which of the plurality of subsystems must be the selected ones in order to perform the debug operation.
4. A method as in claim 1 , further comprising:
selectively pausing the debug operation based upon the activation status information.
5. A method as in claim 1 , wherein the step of selecting comprises:
writing activation control information to a debug control register.
6. A data processing system, comprising:
a plurality of subsystems; and
means for performing a debug operation, comprising:
means for selecting which of the plurality of subsystems are to be activated during the debug operation; and
means for individually controlling activation of each of the plurality of subsystems during the debug operation, wherein an operating mode of the data processing system is unchanged by activation, wherein the means for individually controlling activation of each of the plurality of subsystems comprises at least one of means for changing an attribute of a clock provided to at least one of the plurality of subsystems or means for changing power usage of at least one of the plurality of subsystems.
7. A data processing system as in claim 6 , wherein the means for performing the debug operation further comprises:
means for receiving activation status information from at least one of the plurality of subsystems.
8. A data processing system as in claim 7 , wherein the means for receiving activation status information comprises:
at least one status register field for each of the at least one of the plurality of subsystems.
9. A data processing system as in claim 7 , wherein the debug operation is selectively paused based upon the activation status information.
10. A data processing system as in claim 6 , wherein the means for selecting comprises:
at least one control register field for at least one of the plurality of subsystems.
11. A data processing system as in claim 6 , wherein the means for selecting which of the plurality of subsystems are to be activated during the debug operation also comprises means for determining a level of activation.
12. A data processing system as in claim 6 , wherein the means for individually controlling activation of each of the plurality of subsystems comprises means for changing frequency of a clock provided to at least one of the plurality of subsystems.
13. A data processing system as in claim 6 , wherein the means for individually controlling activation of each of the plurality of subsystems activates only those ones of the plurality of subsystems which are required to perform the debug operation.
14. A data processing system as in claim 6 , wherein the means for individually controlling activation releases each of the plurality of subsystems to a state of activation which each of the plurality of subsystems had before initiation of the debug operation.
15. A data processing system, comprising:
a first subsystem;
a second subsystem; and
a debug unit for performing a debug operation, comprising:
a first control register field which stores first activation control information corresponding to at least one of a power attribute or a clock attribute for the debug operation for the first subsystem;
a second control register field which stores second activation control information corresponding to at least one of a power attribute or a clock attribute for the debug operation for the second subsystem;
a first status register field which indicates first activation status information for the debug operation for the first subsystem; and
a second status register field which indicates second activation status information for the debug operation for the second subsystem.
16. A data processing system, comprising:
a first subsystem;
a second subsystem; and
circuitry which provides first activation control information corresponding to at least one of a power attribute or a clock attribute for a debug operation to the first subsystem and which provides second activation control information corresponding to at least one of a power attribute or a clock attribute for the debug operation to the second subsystem, wherein the first activation control information and the second activation control information produce a different response in the first and second subsystems, and wherein the first and second activation control information do not request the data processing system to change an operating mode.
17. A data processing system, comprising:
a first subsystem;
a second subsystem; and
circuitry which provides first activation control information corresponding to at least one of a power attribute or a clock attribute for a debug operation to the first subsystem and which provides second activation control information corresponding to at least one of a power attribute or a clock attribute for the debug operation to the second subsystem, wherein the circuitry receives first activation status information in response to providing the first activation control information and receives second activation status information in response to providing the second activation control information, wherein the first activation status information indicates a level of activation of the first subsystem and the second activation status information indicates a level of activation of the second subsystem.