Sublithographic contact structure, phase change memory cell with optimized heater shape, and manufacturing method thereof
View Patent ↗An electronic semiconductor device has a sublithographic contact area between a first conductive region and a second conductive region. The first conductive region is cup-shaped and has vertical walls which extend, in top plan view, along a closed line of elongated shape. One of the walls of the first conductive region forms a first thin portion and has a first dimension in a first direction. The second conductive region has a second thin portion having a second sublithographic dimension in a second direction transverse to the first dimension. The first and the second conductive regions are in direct electrical contact at their thin portions and form the sublithographic contact area. The elongated shape is chosen between rectangular and oval elongated in the first direction. Thereby, the dimensions of the contact area remain approximately constant even in presence of a small misalignment between the masks defining the conductive regions.
1. A phase change memory cell comprising:
a cup-shaped resistive element comprising vertical walls forming a first portion in a first direction, the first thin portion having a dimension less than 100 nm; and
a memory region of a phase change material including a second thin portion having a second dimension in a second direction transverse to said first dimension, the second dimension being less than 100 nm;
said resistive element and said memory region being in direct electrical contact at said first thin portion and said second thin portion and defining a contact area having an extension less than 100 nm,
wherein said resistive element extends, in top plan view, along a closed line having an elongated shape in said first direction.
2. The memory cell according to claim 1 , wherein said elongated shape is chosen between rectangular and elongated oval.
3. The memory cell according to claim 1 , wherein said memory region crosses, and is in direct electrical contact with, said resistive element only at said first thin portion so as to form a single contact area.
4. The memory cell according to claim 1 , wherein said second thin portion is laterally delimited, at least in said second direction, by spacer portions of a first dielectric material defining surfaces that are inclined in a third direction transverse to said first and second directions.
5. The memory cell according to claim 4 , wherein said spacer portions are surrounded by a mold layer of a second dielectric material forming a lithographic opening.
6. The memory cell according to claim 1 , wherein said second thin portion is surrounded by a mold layer of a second dielectric material forming an opening having an approximately rectangular shape.
7. The memory cell according to claim 6 , wherein said second thin portion is in direct contact with said mold layer and said opening is of a dimension less than 100 nm.
8. The memory cell according to claim 1 , wherein said second thin portion has a substantially elongated shape with a principal dimension extending parallel to said first direction.
9. A process for manufacturing a phase change memory cell, comprising:
forming a cup-shaped resistive element comprising vertical walls forming a first thin portion having a first dimension in a first direction, the first dimension being less than 100 nm; and
forming a memory region of a phase change material in direct electrical contact with said first thin portion including a second thin portion and having a second dimension in a second direction transverse to said first dimension, the second dimension being less than 100 nm;
said first and second thin portions defining a contact area having an extension less than 100 nm;
wherein said resistive element extends, in top plan view, along a closed line having an elongated shape in said first direction.
10. The process according to claim 9 , wherein said elongated shape is chosen between rectangular and elongated oval.
11. The process according to claim 9 , wherein said step of forming a resistive element comprises forming a first lithographic opening in an insulating layer, depositing a conductive layer on a side wall of said second lithographic opening, and filling said second lithographic opening.
12. The process according to claim 9 , wherein said step of forming a memory region comprises forming a mold structure on top of said resistive element, said mold structure having a slit crossing said first thin portion only in one point, said slit having said second dimension;
depositing a phase change layer at least inside said slit and forming said second thin portion.
13. The process according to claim 12 , wherein said step of forming a mold structure comprises depositing a mold layer; forming a second lithographic opening in said mold layer; and forming spacer portions in said second lithographic opening, said spacer portions delimiting said slit.
14. The process according to claim 13 , wherein said step of forming spacer portions comprises, after said step of forming a second lithographic opening, depositing a spacer layer and anisotropically etching said spacer layer.
15. The process according to claim 12 , wherein said resistive layer is formed in an insulating layer and said step of forming a mold structure comprises depositing a first delimitation layer on top of said insulating layer, said first delimitation layer forming a step having a vertical wall extending transversely to said first thin portion; forming a sacrificial portion along said vertical wall; removing part of said sacrificial portion to form a sacrificial region that crosses said resistive element in just one point; forming a second delimitation area extending above said insulating layer and at the sides of said sacrificial region as well as of said first delimitation layer; and removing said sacrificial region to form a delimitation opening.
16. The process according to claim 15 , wherein, before forming a first delimitation layer, a step is carried out of depositing a mold layer on top of said insulating layer; and in which, after said step of removing said sacrificial region, steps are carried out of forming said slit in said mold layer underneath said delimitation opening and removing said first delimitation layer and said second delimitation layer.