IP Library Granted Patent US 6,875,546
Granted Patent B2
US 6,875,546 · App. 10/377,844 · Granted Apr 5, 2005

Method of patterning photoresist on a wafer using an attenuated phase shift mask

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,875,546
App. No.
10/377,844
Granted
Apr 5, 2005
Kind
B2
Abstract

An attenuated phase shift mask ( 10 or 20 ) includes a substrate ( 12 or 22 ) and an attenuation stack ( 11 or 21 ) overlying the substrate. The attenuation stack includes a chromium layer or ruthenium layer ( 14 or 24 ) overlying the substrate, a tantalum silicon oxide layer ( 16 or 26 ) overlying the chromium layer or the ruthenium layer, and a tantalum silicon nitride layer ( 18 or 28 ) overlying the tantalum silicon oxide layer. The attenuation stack may also include a layer ( 30 ) between the substrate ( 22 ) and the chromium or ruthenium layer ( 24 ). In one embodiment, this layer is a portion of the substrate. The attenuation stack is used to pattern photoresist ( 50 ) on a semiconductor wafer. In one embodiment, portions of the substrate adjacent the attenuation stack has a transmission of greater than 90 percent and the attenuation stack has a transmission of 5 to 20 percent at the exposure wavelength. In one embodiment, an inspection contrast between the substrate and the attenuation stack at an inspection wavelength is greater than 75 percent.

Claims (36)

1. An attenuated phase shift mask, comprising:

a substrate; and

an attenuation stack overlying the substrate, wherein the attenuation stack comprises a first layer overlying the substrate, a tantalum silicon oxide layer overlying the first layer, and a tantalum silicon nitride layer overlying the tantalum silicon oxide layer, and wherein the first layer is one of a chromium layer or a ruthenium layer.

2. The attenuated phase shift mask of claim 1 , wherein the attenuation stack further comprises a second layer between the substrate and the first layer.

3. The attenuated phase shift mask of claim 2 , wherein the second layer is a portion of the substrate.

4. The attenuated phase shift mask of claim 3 , wherein the second layer is formed by removing portions of the substrate adjacent to the attenuation stack.

5. The attenuated phase shift mask of claim 1 , wherein portions of the substrate adjacent the attenuation stack has a transmission of greater than 90 percent at an exposure wavelength, and the attenuation stack has a transmission of 5 to 20 percent at the exposure wavelength.

6. The attenuated phase shift mask of claim 5 , wherein the first layer is doped to provide a reflection of less than 10 percent at the exposure wavelength.

7. The attenuated phase shift mask of claim 1 , wherein the first layer further comprises at least one of oxygen and nitrogen.

8. The attenuated phase shift mask of claim 1 , wherein an inspection contrast between the substrate and the attenuation stack at an inspection wavelength is greater than 75 percent.

9. A method for patterning photoresist on a wafer utilizing optical radiation, the method comprising:

providing an attenuated phase shift mask including a substrate and an attenuation stack overlying the substrate, the attenuation stack comprising a chromium layer or a ruthenium layer overlying the substrate, a tantalum silicon oxide layer overlying the chromium layer or the ruthenium layer, and a tantalum silicon nitride layer overlying the tantalum silicon oxide layer; and

patterning a photoresist layer on the wafer using the mask, wherein patterning comprises passing optical radiation through the attenuated phase shift mask to expose portions of the photoresist layer.

10. The method of claim 9 , wherein the optical radiation passing through the mask and exposing the photoresist layer has an exposure wavelength of at least 150 nanometers.

11. The method of claim 10 , wherein the optical radiation passing through portions of the substrate of the attenuated phase shift mask adjacent to the attenuation stack has a transmission of greater than 90 percent at the exposure wavelength and the optical radiation passing through the attenuated stack has a transmission of 5 to 20 percent at the exposure wavelength.

12. The method of claim 11 , wherein the attenuation stack provides a 180 degree phase shift of the optical radiation.

13. The method of claim 9 , wherein the attenuation stack further comprises a layer between the substrate and the chromium layer or the ruthenium layer.

14. The method of claim 13 , wherein the layer is a portion of the substrate.

15. The method of claim 14 , wherein the layer is formed by removing portions of the substrate adjacent to the attenuation stack.

16. The method of claim 9 , wherein the attenuation stack has a thickness of at most 1000 Angstroms.

17. The method of claim 9 , wherein the attenuation stack has a thickness of at most 700 Angstroms.

18. The method of claim 9 , wherein an inspection contrast between the substrate and the attenuation stack at an inspection wavelength is greater than 75 percent.

19. A method for patterning photoresist on a wafer utilizing optical radiation, the method comprising:

providing an attenuated phase shift mask including a substrate and an attenuation stack overlying the substrate, wherein the attenuation stack comprises a first layer, a second layer, and a third layer, wherein the first layer comprises one of chromium or ruthenium, the second layer comprises tantalum silicon oxide, and the third layer comprises tantalum silicon nitride; and

patterning a photoresist layer on the wafer using the mask, wherein patterning comprises passing optical radiation through the attenuated phase shift mask to expose portions of the photoresist layer.

20. The method of claim 19 , wherein the first and second layers are between the substrate and the third layer.

21. The method of claim 19 , wherein the second and third layers are between the substrate and the first layer.

22. The method of claim 19 , wherein portions of the substrate adjacent to the attenuation stack are removed to form a fourth layer of the attenuation stack.

23. The method of claim 22 , wherein the attenuation stack includes only the first, second, third, and fourth layers.

24. The method of claim 19 , wherein the attenuation stack includes only the first, second, and third layers.

25. The method of claim 19 , wherein the optical radiation passing through the mask and exposing the photoresist layer has a wavelength of at least 157 nanometers, and wherein the optical radiation passing through portions of the substrate of the attenuated phase shift mask adjacent to the attenuation stack has a transmission of greater than 90 percent and the optical radiation passing through the attenuated stack has a transmission of 5 to 20 percent.

26. The method of claim 25 , wherein the attenuation stack provides a 180 degree phase shift of the optical radiation.

27. The attenuated phase shift mask of claim 25 , wherein the first layer is doped to provide a reflection of less than 10 percent of the optical radiation.

28. The method of claim 19 , wherein the attenuation stack has a thickness of at most 1000 Angstroms.

29. The method of claim 19 , wherein an inspection contrast between the substrate and the attenuation stack at an inspection wavelength is greater than 75 percent.

30. The attenuated phase shift mask of claim 19 , wherein the first layer further comprises at least one of oxygen and nitrogen.

Assignments (21)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Feb 2, 2007
From: FREESCALE SEMICONDUCTOR, INC.; FREESCALE ACQUISITION CORPORATION; FREESCALE ACQUISITION HOLDINGS CORP.; FREESCALE HOLDINGS (BERMUDA) III, LTD.
To: CITIBANK, N.A. AS COLLATERAL AGENT
Reel/Frame 018855/0129 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2004
From: MOTOROLA, INC
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 015360/0718 →