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App. No. 10/385,000 · Confirmation No. 4338

METHOD FOR PRODUCING A SHALLOW TRENCH ISOLATION FOR N- AND P- CHANNEL FIELD-EFFECT TRANSISTORS IN A SEMICONDUCTOR MODULE

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2004-01-29 SPEC Specification 1 View
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2004-01-29 REM Applicant Arguments/Remarks Made in an Amendment 3 View
2003-10-31 CTNF Non-Final Rejection 4 View
2003-10-31 892 List of references cited by examiner 1 View
2003-10-31 1449 List of References cited by applicant and considered by examiner 1 View
2003-10-23 SRNT Examiner's search strategy and results 2 View
2003-06-16 CTMS Miscellaneous Action with shortened statutory period (SSP) 1 View
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2003-03-10 TRNA Transmittal of New Application 2 View
2003-03-10 SPEC Specification 21 View
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2003-03-10 IIFW Issue Information including classification, examiner, name, claim, renumbering, etc. 1 View
2003-03-10 SRFW Search information including classification, databases and other search related notes 1 View
2003-03-10 FWCLM Index of Claims 1 View
2003-03-10 TRNA Transmittal of New Application 2 View
2003-03-10 DRW Drawings-only black and white line drawings 9 View
2003-03-10 SPEC Specification 21 View
2003-03-10 CLM Claims 5 View
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2003-03-10 OATH Oath or Declaration filed 3 View
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Quick Facts
App. No.
10/385,000
Filed
2003-03-10
Granted
2004-08-03
Pub. No.
US20030181019A1
Examiner
LEE, CALVIN
Art Unit
2825
PTA
-120 days