IP Library Granted Patent US 7,074,687
Granted Patent B2
US 7,074,687 · App. 10/407,687 · Granted Jul 11, 2006

Method for forming an ESD protection device

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Quick Facts
Patent No.
US 7,074,687
App. No.
10/407,687
Granted
Jul 11, 2006
Kind
B2
Abstract

An ESD protection device ( 20 ) comprises an N-type epitaxial collector ( 21 ), a first, lightly doped, deep base region ( 221 ) and second, highly doped, shallow base region ( 222 ) that extends a predetermined lateral dimension. The device responds to an ESD event by effecting vertical breakdown between the base regions and the N-type epitaxial collector. The ESD response is controlled by the predetermined lateral dimension, S, which, in one embodiment, may be is determined by a single masking step. Consequently, operation of the ESD protection device is rendered relatively insensitive to the tolerances of a fabrication process, and to variations between processes.

Claims (34)

1. A method of fabricating an ESD protection device, the method comprising:

providing collector layer of a first conductivity type;

forming a first base region in the collector layer, the first base region having a second conductivity type;

forming a second base region in the first base region, the second base region having the second conductivity type;

wherein the first base region and the second base region are formed so that the first base region has a depth that is greater than a depth of the second base region and so that the second base region is more highly doped than the first base region;

and wherein the second base region is formed by:

patterning, with a single mask layer, photoresist on the first base region so as to leave exposed a central area having a predetermined lateral dimension; and

implanting the central area to form the second base region that has a depth less than the depth of the first base region and has a dopant concentration greater than a dopant concentration of the first base region.

2. A method of fabricating an ESD protection device as defined in claim 1 , wherein the first conductivity type is N-type and the second conductivity type is P-type.

3. A method of fabricating an ESD protection device as defined in claim 1 , wherein the first base area and the second base area are formed so that the first base area only partially surrounds the second base area.

4. A method of fabricating an ESD protection device as defined in claim 1 , wherein the patterning establishes a predetermined lateral dimension that is effective to cause an ESD response in which vertical breakdown between the collector region and the first base region predominates with respect to vertical breakdown between the collector region and the second base region.

5. A method of fabricating an ESD protection device as defined in claim 1 , wherein the patterning establishes a predetermined lateral dimension that is effective to cause an ESD response in which vertical breakdown between the collector region and the second base region predominates with respect to vertical breakdown between the collector region and the first base region.

6. A method of fabricating an ESD protection device as defined in claim 1 further comprising:

placing the ESD protection device in an integrated circuit;

providing a conductive pin for coupling the integrated circuit to external signals;

coupling an active semiconductor device coupled to the conductive pin; and

coupling the ESD protection device to the conductive pin.

7. A method of fabricating an ESD protection device comprising:

providing a first base area, the first base area having a first conductivity type and having a first dopant concentration;

providing a second base area formed within the first base area, the second base area having the first conductivity type, having a second dopant concentration, wherein the second base area is formed by:

patterning, with a single mask layer, photoresist on the first base area so as to leave exposed a central area having a predetermined lateral dimension; and

implanting the central area to form the second base area that has a depth less than the depth of the first base area and has a dopant concentration greater than a dopant concentration of the first base area; and

providing a collector area of a second conductivity type and positioned beneath the first and the second base areas.

8. A method of fabricating an ESD protection device as defined in claim 7 , further comprising:

coupling an ESD event to the ESD protection device; and

effecting vertical breakdown between the collector area and one or both of the first and the second base areas in response to the ESD event.

9. A method of fabricating an ESD protection device as defined in claim 8 , further comprising:

controlling occurrence of the vertical breakdown in response to the ESD event by the predetermined lateral dimension of the second base area.

10. A method of fabricating an ESD protection device as defined in claim 8 , further comprising:

forming a relatively wide lateral dimension so that vertical breakdown between the second base area and the collector area predominates over vertical breakdown between the first base area and the collector area in response to the ESD event.

11. A method of fabricating an ESD protection device as defined in claim 8 , further comprising:

forming a relatively narrow lateral dimension so that vertical breakdown between the first base area and the collector area predominates over vertical breakdown between the second base area and the collector area in response to the ESD event.

12. A method of fabricating an ESD protection device as defined in claim 8 , further comprising:

forming an equivalent Zener diode between the collector area and one or both of the first and the second base areas in response to vertical breakdown between the collector area and one or both of the first and the second base areas.

Assignments (22)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Feb 2, 2007
From: FREESCALE SEMICONDUCTOR, INC.; FREESCALE ACQUISITION CORPORATION; FREESCALE ACQUISITION HOLDINGS CORP.; FREESCALE HOLDINGS (BERMUDA) III, LTD.
To: CITIBANK, N.A. AS COLLATERAL AGENT
Reel/Frame 018855/0129 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2004
From: MOTOROLA, INC
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 015360/0718 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 4, 2003
From: WHITFIELD, JAMES D.
To: MOTOROLA, INC.
Reel/Frame 013951/0842 →