Granted Patent
Utility
US 6,690,605
· Confirmation No. 7284
CIRCUIT CONFIGURATION FOR CONVERTING LOGIC SIGNAL LEVELS
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2003-12-22 | IFEE |
Issue Fee Payment (PTO-85B) | 1 | View | |
| 2003-04-09 | TRNA |
Transmittal of New Application | 2 | View | |
| 2003-04-09 | SPEC |
Specification | 18 | View | |
| 2003-04-09 | CLM |
Claims | 7 | View | |
| 2003-04-09 | ABST |
Abstract | 1 | View | |
| 2003-04-09 | DRW |
Drawings-only black and white line drawings | 2 | View | |
| 2003-04-09 | OATH |
Oath or Declaration filed | 2 | View |
Inventors
Andre Schafer
Munchen, GERMANY
Joachim Schnabel
Munchen, GERMANY
Classification
USPC
365/226
G11C7/1057
G11C7/1051
G11C7/1078
G11C7/1084
G11C11/4093
H03K3/356113
H03K19/018521
Prosecution
- Examiner
- TRAN, ANDREW Q
- Art Unit
- 2824
- Docket No.
- P2002,0241
- Confirmation No.
- 7284
Foreign Priority
102 15 546.1
·
2002-04-09
·
GERMANY
Publication
- Pub. No.
- US20030189477A1
- Pub. Date
- 2003-10-09
Patent Term Adjustment
-4days
No related applications found.
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2015-10-08
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2003-12-22
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Quick Facts
- Patent No.
- US 6,690,605
- App. No.
- 10/410,383
- Filed
- 2003-04-09
- Granted
- 2004-02-10
- Pub. No.
- US20030189477A1
- Examiner
- TRAN, ANDREW Q
- Art Unit
- 2824
- PTA
- -4 days
External Links