Method and apparatus for masking known fails during memory tests readouts
View Patent ↗Embodiments of the present invention generally provide methods and apparatus for testing memory devices having normal memory elements and redundant memory elements. During a front-end testing procedure, normal memory elements that are found to be defective are replaced by redundant memory elements. During the front-end test, redundant memory elements that are found to be defective may be marked as defective by blowing associated mask fuses. During a back-end testing procedure, the results of testing a normal memory element may be masked (e.g., forced to a passing result) if the normal memory element has been replaced by a redundant memory element. Similarly, the results of testing a redundant memory element may be masked if the redundant memory element was previously found to be defective, as indicated by an associated mark fuse. By masking the test results for memory elements (normal and redundant) that have been previously found defective, the memory elements may be tested in the same manner during front-end and back-end testing.
1. A memory device comprising:
a plurality of memory elements to be tested;
a mask determining circuit configured to assert a mask signal if a memory element under test has previously been found defective; and
a test circuit to generate pass or fail test results for the memory element under test, the test circuit configured to:
write reference data to the memory element under test,
read stored data from the memory element under test,
compare the stored data to the reference data,
generate a pass result regardless of the results of the comparison if the mask signal is asserted, and
generate a pass result only if the stored data matches the reference data if the mask signal is not asserted.
2. The memory device of claim 1 , wherein the plurality of memory elements to be tested comprise normal memory elements and redundant memory elements.
3. The memory device of claim 2 , wherein the mask determining circuit is configured to assert the mask signal if the memory element under test is a normal memory element that has been replaced with a redundant memory element.
4. The memory device of claim 2 , wherein the memory device further comprises a plurality of mask fuses, each to indicate an associated one of the redundant memory elements is defective.
5. The memory device of claim 4 , wherein the mask determining circuit is configured to assert the mask signal if the memory element under test is a redundant memory element and the associated mask fuse indicates the redundant memory element is defective.
6. A method of testing a memory element of a semiconductor memory device, comprising, within the memory device:
(a) writing reference data to a memory element;
(b) reading stored data from the memory element;
(c) comparing the stored data to the reference data;
(d) determining if the memory element has previously been found defective;
(e) generating a pass result regardless of the results of the comparison in response to determining the memory element has previously been found defective; and
(f) generating a pass result only if the stored data matches the reference data in response to determining the memory device has not been previously found to be defective.
7. The method of claim 6 , wherein determining if the memory element has previously been found defective in (d) comprises sensing the state of a fuse.
8. The method of claim 6 , wherein the semiconductor memory device comprises a plurality of normal memory elements and a plurality of redundant memory elements.
9. The method of claim 8 , further comprising repeating steps (a)–(f) for each of the normal memory elements.
10. The method of claim 9 , further comprising repairing the memory device by replacing normal memory elements that did not achieve a pass result in (e) or (f) with non-defective redundant memory elements.
11. The method of claim 10 , further comprising determining which of the redundant memory elements are non-defective.
12. The method of claim 11 , wherein determining which of the redundant memory elements are non-defective comprises reading fuse information from the memory device.
13. The method of claim 9 , further comprising repeating steps (a)–(f) for each of the redundant memory elements.