IP Library Granted Patent US 7,188,630
Granted Patent B2
US 7,188,630 · App. 10/431,053 · Granted Mar 13, 2007

Method to passivate conductive surfaces during semiconductor processing

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Quick Facts
Patent No.
US 7,188,630
App. No.
10/431,053
Granted
Mar 13, 2007
Kind
B2
Abstract

A method for processing semiconductor wafers is disclosed. A solution is applied to a semiconductor wafer to prevent dendrites and electrolytic reactions at the surface of metal interconnects. The solution can be applied during a CMP process or during a post CMP cleaning process. The solution may include a surfactant and a corrosion inhibitor. In one embodiment, the concentration of the surfactant in the solution is less than approximately one percent by weight and the concentration of the corrosion inhibitor in the solution is less than approximately one percent by weight. The solution may also include a solvent and a cosolvent. In an alternate embodiment, the solution includes a solvent and a cosolvent without the surfactant and corrosion inhibitor. In one embodiment, the CMP process and post CMP cleaning process can be performed in the presence of light having a wavelength of less than approximately one micron.

Claims (16)

1. A method for processing semiconductor wafers, comprising:

rinsing a surface of a semiconductor wafer having a plurality of conductive interconnects, wherein the plurality of the conductive interconnects are electrically isolated along the surface of the semiconductor wafer;

applying a solution to the semiconductor wafer, wherein the solution comprises a surfactant and a corrosion inhibitor and is applied during rinsing or after the rinsing of the surface of the semiconductor wafer; and

drying the semiconductor wafer after applying the solution to the semiconductor wafer, wherein at least one of the rinsing and the drying is performed in the presence of light having a wavelength of less than approximately one micron.

2. The method of claim 1 , wherein the solution is applied during and after the rinsing of the surface of the semiconductor wafer.

3. The method of claim 1 , wherein the rinsing is performed during a chemical mechanical polishing (CMP) process.

4. The method of claim 3 , wherein the drying is performed during a post CMP clean.

5. The method of claim 1 , wherein the surfactant comprises one of polyethylene glycol (PEG), polypropylene glycol (PPG), a block copolymer of polypropylene oxide (PPO) or polyethylene oxide (PLO), ammonium dodecyl sulfate, or alkyl phenol ether phosphate, amino ethyl imidazoline.

6. The method of claim 1 , wherein the corrosion inhibitor comprises one of benzene triazole (BTA), triazole, caffeine, theophylline, or bipyridyl.

7. The method of claim 1 , wherein the solution further comprises a solvent selected from a group consisting of alcohol, glycol, and acetone.

8. The method of claim 1 , wherein both the rinsing and the drying are performed in the presence of light having a wavelength of less than approximately one micron.

9. The method of claim 1 , wherein the plurality of the conductive interconnects comprise a conductive material selected from a group consisting of copper, aluminum, tungsten, silver, tantalum, and titanium.

10. The method of claim 1 , wherein the surfactant comprises the corrosion inhibitor.

11. The method of claim 1 , wherein applying the solution comprises at least one of submerging the semiconductor wafer into the solution, spraying the solution onto the semiconductor wafer, or pouring the solution onto the semiconductor wafer.

12. The method of claim 1 , wherein a concentration of the surfactant in the solution is less than approximately one percent by weight.

13. The method of claim 1 , wherein a concentration of the corrosion inhibitor in the solution is less than approximately one percent by weight.

Assignments (20)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
323.01(C) ASSIGNMENT OR CHANGE OF NAME IMPROPERLY FILED AND RECORDED BY ANOTHER PERSON AGAINST OWNER'S PATENT Recorded Oct 3, 2019
From: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 052459/0656 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2017
From: NORTH STAR INNOVATIONS INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 041717/0736 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Feb 2, 2007
From: FREESCALE SEMICONDUCTOR, INC.; FREESCALE ACQUISITION CORPORATION; FREESCALE ACQUISITION HOLDINGS CORP.; FREESCALE HOLDINGS (BERMUDA) III, LTD.
To: CITIBANK, N.A. AS COLLATERAL AGENT
Reel/Frame 018855/0129 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2004
From: MOTOROLA, INC
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 015360/0718 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2003
From: FLAKE, JOHN C.; COOPER, KEVIN E.; USMANI, SAIFI
To: MOTOROLA, INC.
Reel/Frame 014058/0382 →