Porous substrate and its manufacturing method, and gan semiconductor multilayer substrate and its manufacturing method
View Patent ↗A structure of a substrate used for growing a crystal layer of a semiconductor, particularly a group-III nitride semiconductor and its manufacturing method. The substrate comprises two porous layers on a base. The mean opening diameter of the pores of the first porous laser, the outermost layer, is smaller than the means diameter of the pores in the second porous layer nearer to the base than the first porous layer. The first and second porous layers have volume porosities of 10 to 90%. More then 50% of the pores of the first porous layer extend from the surface of the first porous layer and reach the interface between the first and second porous layers. Even by a conventional crystal growing method, an epitaxial crystal of low defect density can be easily grown on the porous substrate.
1. A porous substrate, comprising:
a substrate and;
a plurality of porous layers on the substrate,
wherein an average opening diameter of pores in a first porous layer of said plurality of porous layers positioned in an outermost surface is smaller than an average diameter of pores in a second porous layer of said plurality of porous layers positioned on a substrate side relative to said first porous layer, said first porous layer comprising a metal material, a metal oxide, a metal nitride, a metal carbide, or combinations thereof, and said second porous layer comprising a semiconductor material.
2. A porous substrate, comprising:
a substrate; and
a plurality of porous layers on the substrate,
wherein an average opening diameter of pores in a first porous layer of said plurality of porous layers positioned in an outermost surface is smaller than an average diameter of pores in a second porous layer of said plurality of porous layers positioned on a substrate side relative to said first porous layer, said first porous layer comprising a metal material, a metal oxide, a metal nitride, a metal carbide, or combinations thereof, and said second porous layer comprising a semiconductor material; and a volume porosity of said plurality of porous layers is 10%-90%.
3. A porous substrate, comprising:
a substrate; an
two porous layers on the substrate,
wherein an average opening diameter of pores in a first porous layer of said two porous layers positioned in an outermost surface is smaller than an average diameter of pores in a second porous layer positioned on a substrate side relative to said first porous layer, said first porous layer comprising a metal material, a metal oxide, a metal nitride, a metal carbide, or combinations thereof, and said second porous layer comprising a semiconductor material; and more than 50% of said pores in said first porous layer penetrate from a surface of said first porous layer to an interface between said first and second porous layer.
4. A porous substrate, comprising:
a substrate; and
two porous layers on the substrate,
wherein an average opening diameter of pores in a first porous layer of said two porous layers positioned in an outermost surface is smaller than an average diameter of pores in a second porous layer positioned on a substrate side relative to said first porous layer, said first porous layer comprising a metal material, a metal oxide, a metal nitride, a metal carbide, or combinations thereof, and said second porous layer comprising a semiconductor material; more than 50% of said pores in said first porous layer penetrate from a surface of said first porous layer to an interface between said first and second porous layer; and a volume porosity of said first and second porous layer is 10%-90%.
5. The porous substrate according to claim 3 , wherein said first porous layer comprises a metal material.
6. The porous substrate according to claim 3 , wherein said second porous layer comprises a group III nitride series compound semiconductor material.
7. The porous substrate according to claim 3 , wherein said first porous layer comprises TiN or Pt, and said second porous layer comprises GaN.
8. The porous substrate according to claim 3 , wherein said average opening diameter of said porosity in said first porous layer is not more than 1 μm.
9. The porous substrate according to claim 3 , wherein the film thickness of said first porous layer is not more than 1 μM.
10. A GaN series semiconductor layered substrate, comprising a GaN series semiconductor layer grown on the porous substrate defined in claim 1 .
11. A GaN series semiconductor layered substrate, comprising a GaN series semiconductor layer grown on the porous substrate defined in claim 2 .
12. A GaN series semiconductor layered substrate, comprising a GaN series semiconductor layer grown on the porous substrate defined in claim 3 .
13. A GaN series semiconductor layered substrate, comprising a GaN series semiconductor layer grown on the porous substrate defined in claim 4 .