IP Library Granted Patent US 7,079,442
Granted Patent B2
US 7,079,442 · App. 10/612,733 · Granted Jul 18, 2006

Layout of driver sets in a cross point memory array

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Quick Facts
Patent No.
US 7,079,442
App. No.
10/612,733
Granted
Jul 18, 2006
Kind
B2
Abstract

Layouts of driver sets in a cross point memory array. Since both terminals of a memory cell in a cross point structure are typically used for selection purposes, dedicated driver sets are typically required for both x and y directions. By fabricating the cross point array above the driver circuitry, several different driver set layouts can be utilized that allow for varying designs.

Claims (108)

1. A re-writable memory comprising:

a semiconductor substrate;

a cross point memory array formed above the semiconductor substrate, including

at least one x-direction conductive layer that includes conductive array lines;

at least one y-direction conductive layer that includes conductive array lines; and

memory plugs;

at least one x-direction driver set that drives the at least one x-direction conductive layer, the at least one x-direction driver set being formed on the semiconductor substrate; and

at least one y-direction driver set that drives the at least one y-direction conductive layer, the at least one y-direction driver set being formed on the semiconductor substrate;

wherein the at least one x-direction driver set and the at least one y-direction driver set both use logic to drive isolated conductive array lines, and wherein at least one driver set is substantially underneath the cross point memory array.

2. The re-writable memory of claim 1 , wherein:

a first portion of at least one driver set is positioned on a first side of the cross point array, and a second portion of the at least one driver set is positioned on the opposite side of the cross point array.

3. The re-writable memory of claim 2 , wherein:

the first and second portions of the at least one driver set are interdigitated.

4. The re-writable memory of claim 3 , wherein:

the at least one driver set substantially underneath the cross point array is the at least one x-direction driver set.

5. The re-writable memory of claim 4 , wherein

the at least one y-direction driver set is not underneath the cross point memory array.

6. The re-writable memory of claim 4 , wherein:

a portion of the at least one y-direction driver set is underneath the cross point memory array.

7. The re-writable memory of claim 3 , wherein:

the at least one driver set substantially underneath the cross point array is the at least one y-direction driver set.

8. The re-writable memory of claim 7 , wherein

the at least one x-direction driver set is not underneath the cross point memory array.

9. The re-writable memory of claim 2 , wherein:

a portion of the at least one x-direction driver set is underneath the cross point memory array.

10. The re-writable memory of claim 2 , wherein:

the first and second portions of the at least one driver set are not interdigitated.

11. The re-writable memory of claim 10 , wherein:

all the driver sets are substantially underneath the cross point memory array.

12. The re-writable memory of claim 11 , wherein:

there are at least four driver sets that drive three x-direction conductive layers and two y-direction conductive layers.

13. The re-writable memory of claim 12 , wherein:

there are at least six driver sets that drive five x-direction conductive layers and four y-direction conductive layers.

14. The re-writable memory of claim 11 , further comprising:

other peripheral circuitry that is formed in the semiconductor substrate and is substantially underneath the cross point memory array.

15. A re-writable memory comprising:

a semiconductor substrate;

a cross point array that is formed on top of the semiconductor substrate and electrically connected to the semiconductor substrate, the cross point array including a layer of x-direction conductive array lines, a layer of memory plugs, and a layer of y-direction conductive array lines;

an x-direction driver set formed on the semiconductor substrate, each driver within the set being electrically coupled to a single x-direction conductive array line on the layer of x-direction conductive array lines; and

a y-direction driver set formed on the semiconductor substrate, each driver within the set being operably connected to a single y-direction conductive array line on the layer of y-direction conductive array lines and being operable to drive a memory plug to a read voltage or a write voltage in conjunction with the x-direction driver set;

wherein at least one of the driver sets is substantially underneath the cross point memory array.

16. The re-writable memory of claim 15 , wherein:

a first portion of at least one driver set is positioned on a first side of the cross point array, and a second portion of the at least one driver set is positioned on the opposite side of the cross point array.

17. The re-writable memory of claim 16 , wherein:

the first and second portions of the at least one driver set are interdigitated.

18. The re-writable memory of claim 16 , wherein:

the first and second portions of the at least one driver set are not interdigitated.

19. The re-writable memory of claim 15 , wherein:

all the driver sets are substantially underneath the cross point memory array.

20. The re-writable memory of claim 19 , wherein:

the cross point array has multiple layers of memory plugs.

21. A re-writable memory comprising:

a semiconductor substrate;

a cross point memory array formed above the semiconductor substrate, including

at least one x-direction conductive layer that includes conductive array lines;

at least one y-direction conductive layer that includes conductive array lines; and

memory plugs;

at least one x-direction driver set that drives the at least one x-direction conductive layer, the at least one x-direction driver set being formed on the semiconductor substrate; and

at least one y-direction driver set that drives the at least one y-direction conductive layer, the at least one y-direction driver set being formed on the semiconductor substrate;

wherein at least one x-direction driver set is entirely driving conductive array lines from one side of the conductive array.

22. The re-writable memory of claim 21 , wherein:

the at least one x-direction driver set and the at least one y-direction driver set both use logic to drive isolated conductive array lines.

23. The re-writable memory of claim 21 , wherein:

the at least one x-direction driver set is substantially underneath the cross point memory array.

24. The re-writable memory of claim 23 , wherein:

all x-direction driver sets are substantially underneath the cross point memory array.

25. The re-writable memory of claim 21 , wherein:

the memory plugs exhibit a non-linear resistive characteristic.

26. The re-writable memory of claim 25 , wherein:

the memory plug includes a conductive metal oxide.

27. A re-writable memory comprising:

a semiconductor substrate;

a cross point memory array formed above the semiconductor substrate, including

at least one x-direction conductive layer that includes a portion of contiguous x-direction conductive array lines;

at least one y-direction conductive layer that includes a portion of contiguous y-direction conductive array lines; and

memory plugs;

at least one x-direction driver set that drives the at least one x-direction conductive layer, the at least one x-direction driver set including a non-interdigitated driver subset that

drives the portion of contiguous x-direction conductive array lines; and

is formed on the semiconductor substrate such that it makes electrical contact with the portion of contiguous x-direction conductive array lines from a first side of the cross point array; and at least one y-direction driver set that drives the at least one y-direction conductive layer, the at least one y-direction driver set being formed on the semiconductor substrate.

28. The re-writable memory of claim 27 , wherein:

the non-interdigitated driver subset is placed underneath the cross point memory array.

29. The re-writable memory of claim 27 , wherein:

the at least one x-direction conductive layer includes a second portion of contiguous x-direction conductive array lines; and

the at least one x-direction driver set includes a second non-interdigitated driver subset that

drives the second portion of contiguous x-direction conductive array lines; and

is formed on the semiconductor substrate such that it makes electrical contact with the second portion of contiguous x-direction conductive array lines from a second side of the cross point array, the second side being opposite from the first side.

30. The re-writable memory of claim 29 , wherein:

the at least one y-direction driver set includes a second non-interdigitated driver subset that

drives the portion of contiguous y-direction conductive array lines; and

is formed on the semiconductor substrate such that it makes electrical contact with the portion of contiguous y-direction conductive array lines from a third side of the cross point array, the third side being adjacent to the first side.

31. The re-writable memory of claim 30 , wherein:

the at least one y-direction conductive layer includes a second portion of contiguous y-direction conductive array lines; and

the at least one y-direction driver set includes a second non-interdigitated driver subset that

drives the second portion of contiguous y-direction conductive array lines; and

is formed on the semiconductor substrate such that it makes electrical contact with the second portion of contiguous y-direction conductive array lines from a fourth side of the cross point array, the fourth side being opposite from the third side.

32. The re-writable memory of claim 31 , wherein:

the x-driver subsets and the y-driver subsets are placed underneath the cross point memory array.

33. The re-writable memory of claim 27 , wherein:

the cross point memory array formed above the semiconductor substrate is one of a plurality of cross point memory arrays formed above the semiconductor substrate.

34. The re-writable memory of claim 33 , wherein:

the memory is organized to read or write N bits of data at a time, and

the number of cross point memory arrays in the plurality of cross point memory arrays is N or a multiple of N.

35. The re-writable memory of claim 27 , wherein:

the re-writable memory is a portable storage device.

36. The re-writable memory of claim 35 , wherein:

the memory plugs exhibit a non-linear resistive characteristic.

37. The re-writable memory of claim 36 , wherein:

the memory plug includes a conductive metal oxide.

Assignments (4)
RELEASE Recorded Apr 9, 2012
From: SILICON VALLEY BANK; GOLD HILL CAPITAL
To: UNITY SEMICONDUCTOR, INC.
Reel/Frame 028132/0675 →
SECURITY AGREEMENT Recorded Apr 13, 2009
From: UNITY SEMICONDUCTOR CORPORATION
To: GOLD HILL CAPITAL
Reel/Frame 023129/0669 →
MERGER Recorded Jul 28, 2005
From: UNITY SEMICONDUCTOR CORPORATION
To: UNITY SEMICONDUCTOR CORPORATION
Reel/Frame 016323/0107 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2003
From: RINERSON, DARRELL; CHEVALLIER, CHRISTOPHE J.; LONGCOR, STEVEN W.; KINNEY, WAYNE; WARD, EDMOND R.; HSIA, STEVE KUO-REN
To: UNITY SEMICONDUCTOR CORPORATION
Reel/Frame 014281/0535 →