Patent Assignment
Reel/Frame 023129/0669
Security Agreement
Recorded: 2009-04-13
Pages: 15
Assignor
UNITY SEMICONDUCTOR CORPORATION
Executed: 2009-04-07
Assignee
GOLD HILL CAPITAL
ONE ALMADEN BLVD. SUITE 630, SUNNYVALE, CALIFORNIA, USA 95113
Covered Properties
(128)
Selection Device for Re-Writable Memory
Memory Using Variable Tunnel Barrier Widths
Serial Memory Interface
Performing Data Operations Using Non-Volatile Third Dimension Memory
Memory Power Management
Movable Terminal in a Two Terminal Memory Array
Memory using mixed valence conductive oxides
Application:
11/095,026 →
Publication:
US US20060171200A1
Securing Data in Memory Device
Scaleable Memory Systems Using Third Dimension Memory
Fast Data Access Through Page Manipulation
Buffering Systems Methods for Accessing Multiple Layers of Memory in Integrated Circuits
Multiple-Type Memory
Circuitry and Method for Indicating a Memory
Memory Emulation in an Image Capture Device
Buffering Systems for Accessing Multiple Layers of Memory in Integrated Circuits
Patent:
7,649,788 →
Application:
12/006,970 →
Memory Emulation in an Electronic Organizer
Memory Emulation in a Cellular Telephone
Combined Memories in Integrated Circuits
Emulation of a Nand Memory System
Oxygen Depleted Etching Process
Application:
11/584,876 →
Publication:
US US20070105390A1
Programmable Logic Device Structure Using Third Dimensional Memory
Conductive Memory Stack with Sidewall
Continuous Plane of Thin-Film Materials for a Two-Terminal Cross-Point Memory
Low Read Current Architecture for Memory
Multi-Step Selective Etching for Cross-Point Memory
Continuous Plane of Thin-Film Materials for a Two-Terminal Cross-Point Memory
Memory Emulation Using Resistivity-Sensitive Memory
Planar Third Dimensional Memory with Multi-Port Access
Integrated Circuits and Methods to Compensate for Defective Memory in Multiple Layers of Memory
Disturb Control Circuits and Methods to Control Memory Disturbs Among Multiple Layers of Memory
Media Player with Non-Volatile Memory
Non-Volatile Register Having a Memory Element and Register Logic Vertically Configured on a Substrate
Method and System for Accessing Non-Volatile Memory
Non-volatile memory compiler
Application:
12/004,740 →
Publication:
US US20090164203A1
Memory access protection
Application:
12/004,734 →
Publication:
US US20090164744A1
Memory Sanitization
Application:
12/005,259 →
Publication:
US US20090172251A1
Non-Volatile memories in interactive entertainment systems
Application:
12/005,687 →
Publication:
US US20090171650A1
Non-volatile processor register
Application:
12/005,685 →
Publication:
US US20090172350A1
Field Programmable Gate Arrays Using Resistivity Sensitive Memories
State Machines Using Resistivity-Sensitive Memories
Radio frequency identification transponder memory
Application:
12/006,187 →
Publication:
US US20090167496A1
Integrated Circuits to Control Access to Multiple Layers of Memory
Integrated circuits and methods to control access to multiple layers of memory
Data Retention Structure for Non-Volatile Memory
Method for Fabricating Multi-Resistive State Memory Devices
Preservation Circuit and Methods to Maintain Values Representing Data in One or More Layers of Memory
Actuator
Application:
61/203,912 →
Conductive metal oxide structures in non-volatile re-writable memory devices
Application:
61/203,163 →
Modulated oxide structure in a non-volatile re-writeable memory device
Application:
61/203,160 →
Memory access circuits and layout of the same for cross-point memory arrays
Application:
61/203,191 →
Cooperative modification of conductivity for oxide structures in non-volatile re-writable memory cells
Application:
61/203,184 →
Conductive oxide electrodes
Application:
61/203,153 →
High voltage switching circuitry for a cross point array
Application:
61/203,229 →
Device fabrication
Application:
61/203,187 →
Memory stack cladding
Application:
61/203,158 →
Memory cell with band gap control
Application:
61/203,154 →
Array operation using a schottky diode as a non-ohmic isolation device
Application:
61/203,189 →
Protecting integrity of data in multi-layered memory with data redundancy
Application:
61/203,166 →
Third dimensional memory with compress engine
Application:
61/203,190 →
Configurable memory interface to provide serial and parallel access to memories
Application:
61/203,203 →
Signal margin improvement in a cross-point memory array
Application:
61/203,212 →
Data storage system with non-volatile memory using both page write and block program and block erase
Application:
61/203,440 →
Multi-structured memory
Application:
61/203,430 →
Digital potentiometer using third dimensional memory
Application:
61/203,446 →
Memory scrubbing in third dimension memory
Application:
61/203,456 →
Data storage system with refresh in place
Application:
61/206,397 →
Multiple layers of memory implemented as different memory technology
Application:
61/206,395 →
Fuse elements based on two-terminal re-writeable non-volatile memory
Application:
61/206,446 →
Non-volatile dual port third dimensional memory
Application:
61/206,447 →
Non-volatile FIFO with third dimension memory
Application:
61/208,933 →
Cross Point Memory Array Using Multiple Thin Films
Patent:
6,753,561 →
Application:
10/330,512 →
Multi-Output Multiplexor
Cross Point Memory Array Using Distinct Voltages
Cross Point Memory Array Using Multiple Modes of Operation
Line Drivers That Fit Within a Specified Line Pitch
Cross Point Memory Array with Memory Plugs Exhibiting a Characteristic Hysteresis
Multiplexor Having a Reference Voltage on Unselected Lines
Non-Volatile Memory with a Single Transistor and Resistive Memory Element
Memory Array of a Non-Volatile Ram
Rewritable Memory with Non-Linear Memory Element
Re-Writable Memory with Multiple Memory Layers
Multiple Modes of Operation in a Cross Point Array
High-Density Nvram
Adaptive Programming Technique for a Re-Writable Conductive Memory Device
Multi-Layer Conductive Memory Device
Providing a Reference Voltage to a Cross Point Memory Array
Memory Element Having Islands
Cross Point Memory Array Exhibiting a Characteristic Hysteresis
Conductive Memory Stack with Non-Uniform Width
Conductive Memory Stack with Non-Uniform Width
Line Drivers That Use Minimal Metal Layers
Discharge of Conductive Array Lines in Fast Memory
Cross Point Array Using Distinct Voltages
2-Terminal Trapped Charge Memory Device with Voltage Switchable Multi-Level Resistance
Memory Array with High Temperature Wiring
Adaptive Programming Technique for a Re-Writable Conductive Memory Device
Cross Point Memory Array with Fast Access Time
Low Temperature Deposition of Complex Metal Oxides (Cmo) Memory Materials for Non-Volatile Memory Integrated Circuits
Conductive Memory Device with Conductive Oxide Electrodes
Multi-Resistive State Material That Uses Dopants
Two Terminal Memory Array Having Reference Cells
Layout of Driver Sets in a Cross Point Memory Array
Multi-Resistive State Element with Reactive Metal
Re-Writable Memory with Multiple Memory Layers
Conductive Memory Array Having Page Mode and Burst Mode Read Capability
Conductive Memory Array Having Page Mode and Burst Mode Write Capability
Non-Volatile Memory with a Single Transistor and Resistive Memory Element
Providing a Reference Voltage to a Cross Point Memory Array
Memory Array of a Non-Volatile Ram
Line Drivers That Fits Within a Specified Line Pitch
High-Density Nvram
Conductive Memory Stack with Sidewall
Cross Point Memory Array with Fast Access Time
Two Terminal Memory Array Having Reference Cells
Laser Annealing of Complex Metal Oxides (Cmo) Memory Materials for Non-Volatile Memory Integrated Circuits
Resistive Memory Device with a Treated Interface
Storage Controller for Multiple Configurations of Vertical Memory
Providing a Reference Voltage to a Cross Point Memory Array
Enhanced Functionality in a Two-Terminal Memory Array
Two-Cycle Sensing in a Two-Terminal Memory Array Having Leakage Current
Method for Two-Cycle Sensing in a Two-Terminal Memory Array Having Leakage Current
Sensing a Signal in a Two-Terminal Memory Array Having Leakage Current
Two Terminal Memory Array Having Reference Cells
Two Terminal Memory Array Having Reference Cells
Two Terminal Memory Array Having Reference Cells
Multi-Resistive State Element with Reactive Metal
Conductive Memory Device with Conductive Oxide Electrodes
Patent:
7,400,006 →
Application:
11/405,958 →
Method for Sensing a Signal in a Two-Terminal Memory Array Having Leakage Current
Related Assignments
(11)
Other recorded transfers of the patents in this record — the chain of ownership.
Release
Apr 9, 2012
From: SILICON VALLEY BANK; GOLD HILL CAPITAL
To: UNITY SEMICONDUCTOR, INC.
Reel/Frame 028132/0675 →
Corrective Assignment to Correct the Indication of Application Number on the Assignment Document Previously Recorded on Reel 020117 Frame 0317. Assignor(S) Hereby Confirms the Assignment.
Sep 27, 2013
From: NORMAN, ROBERT
To: UNITY SEMICONDUCTOR CORPORATION
Reel/Frame 031333/0670 →
Release of Security Interest
Dec 12, 2013
From: SILICON VALLEY BANK; GOLD HILL VENTURE LENDING 03, LP
To: UNITY SEMICONDUCTOR CORPORATION
Reel/Frame 031774/0280 →
Correction to the Recordation Cover Sheet of the Intellectual Property Security Agreement Recorded at 23129/669 on 4/13/2009
Dec 12, 2013
From: UNITY SEMICONDUCTOR CORPORATION
To: SILICON VALLEY BANK; GOLD HILL VENTURE LENDING 03, LP
Reel/Frame 031805/0573 →
Corrective Assignment to Correct the Conveying Party and Execution Date on the Recordation Cover Sheet of the Assignment Previously Recorded on Reel 018903 Frame 458. Assignor(S) Hereby Confirms the Assignment.
Jan 6, 2014
From: NORMAN, ROBERT
To: UNITY SEMICONDUCTOR CORPORATION
Reel/Frame 031923/0510 →
Corrective Assignment to Correct the Conveying Party on the Recordation Cover Sheet of the Assignment Previously Recorded on Reel 020473 Frame 0516. Assignor(S) Hereby Confirms the the Assignment.
Jan 6, 2014
From: NORMAN, ROBERT
To: UNITY SEMICONDUCTOR CORPORATION
Reel/Frame 031923/0551 →
Assignment of Assignor's Interest
Apr 3, 2014
From: UNITY SEMICONDUCTOR CORPORATION
To: III HOLDINGS 1, LLC
Reel/Frame 032606/0079 →
Assignment of Assignor's Interest
May 4, 2018
From: RAMBUS INC.
To: HEFEI RELIANCE MEMORY LIMITED
Reel/Frame 045984/0845 →
Nunc Pro Tunc Assignment
Jun 21, 2018
From: UNITY SEMICONDUCTOR CORPORATION
To: HEFEI RELIANCE MEMORY LIMITED
Reel/Frame 046407/0710 →
Assignment of Assignor's Interest
Jul 5, 2018
From: III HOLDINGS 1, LLC
To: III HOLDINGS 3, LLC
Reel/Frame 046274/0626 →
Assignment of Assignor's Interest
Jan 29, 2019
From: III HOLDINGS 3, LLC
To: SEAGATE TECHNOLOGY LLC
Reel/Frame 048167/0540 →