IP Library Granted Patent US 8,164,656
Granted Patent B2
US 8,164,656 · App. 11/897,726 · Granted Apr 24, 2012

Memory emulation in an image capture device

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Quick Facts
Patent No.
US 8,164,656
App. No.
11/897,726
Granted
Apr 24, 2012
Kind
B2
Abstract

An image capture device using a memory array that is directly addressed and non-volatile is disclosed. The memory array can be used to replace and emulate multiple memory types such as DRAM, SRAM, non-volatile RAM, a non-volatile memory card, and FLASH memory, for example. The memory array may be randomly accessed. Data stored in the memory array is retained in the absence of electrical power. One or more memory arrays may be used in the image capture device. At least one of the memory arrays may be in the form of a removable memory card.

Claims (34)

1. An image capture device, comprising:

an image capture system operative to capture an image and process the image into image data;

a memory controller;

a processing unit electrically coupled with the image capture system and the memory controller, the processing unit including an operating system (OS) and a file manager, the processing unit electrically coupled with the memory controller via a CPU bus; and

at least one non-volatile two-terminal cross-point memory array that is directly accessed, the non-volatile two-terminal cross-point memory array is electrically coupled with the memory controller and is operative to store data including the image data in a plurality of memory elements with each memory element having exactly two terminals and configured to store the data as a plurality of resistive states, and the at least one non-volatile two-terminal cross-point memory array is operative to replace and emulate both volatile and non-volatile memory and is configured for write operations without a FLASH File System (FFS) and without a FLASH erase operation prior to a write operation,

wherein the OS is configured to coordinate memory I/O functions without FLASH polling loads, without FLASH system loads, and without a FLASH pointer system, and

wherein the file manager is specifically configured to understand a file structure of the at least one non-volatile two-terminal cross-point memory array and to translate data from the at least one non-volatile two-terminal cross-point memory array to the CPU bus.

2. The image capture device of claim 1 , wherein the at least one non-volatile two-terminal cross-point memory array is randomly accessed.

3. The image capture device of claim 1 , wherein the memory controller includes a direct memory access (DMA) channel, and the data is accessed by the DMA channel operating in cooperation with the file manager.

4. The image capture device of claim 1 , wherein the at least one non-volatile two-terminal cross-point memory array is operative to replace and emulate dynamic random access memory (DRAM) and the data is retained in the absence of electrical power.

5. The image capture device of claim 4 , wherein the data is retained without a refresh operation to the at least one non-volatile two-terminal cross-point memory array.

6. The image capture device of claim 1 , wherein the at least one non-volatile two-terminal cross-point memory array is operative to replace and emulate static random access memory (SRAM) and the data is retained in the absence of power.

7. The image capture device of claim 1 , wherein the at least one non-volatile two-terminal cross-point memory array is operative to replace and emulate non-volatile random access memory (FLASH) and the data is retained in the absence of electrical power.

8. The image capture device of claim 7 , wherein the at least one non-volatile two-terminal cross-point memory array is operative to perform consecutive write operations.

9. The image capture device of claim 1 , wherein the at least one non-volatile two-terminal cross-point memory array is operative to replace and emulate a removable non-volatile memory card, the data is retained in the absence of electrical power, and the data is retained when the at least one non-volatile two-terminal cross-point memory array is removed from the image capture device.

10. The image capture device of claim 9 , wherein the at least one non-volatile two-terminal cross-point memory array is operative to perform consecutive write operations.

11. The image capture device of claim 1 , wherein the image capture device is a component of a device selected from the group consisting of a cell phone, a digital camera, a computer, a digital video recorder, a game, a personal digital assistant (PDA), a video device, an audio device, and any combination of those devices.

12. The image capture device of claim 1 , wherein data operations to the at least one non-volatile two-terminal cross-point memory array occur at a potential difference that is less than approximately 10 volts.

13. The image capture device of claim 1 , wherein the at least one non-volatile two-terminal cross-point memory array is vertically stacked.

14. An image capture device comprising:

an image capture system operative to capture an image and process the image into image data;

a memory controller;

a processing unit electrically coupled with the image capture system and the memory controller , the processing unit including an operating system (OS) and a file manager, the processing unit electrically coupled with the memory controller via a CPU bus; and

a plurality of non-volatile two-terminal cross-point memory arrays that are directly accessed, the plurality of non-volatile two-terminal cross-point memory arrays are electrically coupled with the memory controller and are operative to store data including the image data in a plurality of memory elements with each memory element having exactly two terminals and configured to store the data as a plurality of resistive states , the plurality of non-volatile two-terminal cross-point memory arrays are operative to replace and emulate both volatile and non-volatile memory, the plurality of non-volatile two-terminal cross-point memory arrays are configured for write operations without a FLASH File System (FFS) and without a FLASH erase operation prior to a write operation, and the data is retained in the absence of electrical power,

wherein the OS is configured to coordinate memory I/O functions without FLASH polling loads, without FLASH system loads, and without a FLASH pointer system, and

wherein the file manager is specifically configured to understand a file structure of the plurality of non-volatile two-terminal cross-point memory arrays and to translate data from the plurality of non-volatile two-terminal cross-point memory arrays to the CPU bus.

15. The image capture device of claim 14 , wherein the memory controller includes a direct memory access (DMA) channel, and the data is accessed by the DMA channel operating in cooperation with the file manager.

16. The image capture device of claim 14 , wherein at least one of the plurality of non-volatile two-terminal cross-point memory arrays is operative to replace and to emulate a memory type selected from the group consisting of dynamic random access memory (DRAM), static random access memory (SRAM), non-volatile random access memory (FLASH), a removable non-volatile memory card, and any combination of those memory types.

17. The image capture device of claim 16 , wherein the data is retained without a refresh operation to the at least one of the plurality of non-volatile two-terminal cross-point memory arrays.

18. The image capture device of claim 14 , wherein the at least one of the plurality of non-volatile two-terminal cross-point memory arrays is operative to perform consecutive write operations.

19. The image capture device of claim 14 , wherein the image capture device is a component of a device selected from the group consisting of a cell phone, a digital camera, a computer, a digital video recorder, a game, a personal digital assistant (PDA), a video device, an audio-video device, and any combination of those devices.

20. The image capture device of claim 14 , wherein data operations to the plurality of non-volatile two-terminal cross-point memory arrays occur at a potential difference that is less than approximately 10 volts.

21. The image capture device of claim 14 , wherein at least one of the plurality of non-volatile two-terminal cross-point memory arrays is vertically stacked.

22. The image capture device of claim 14 , wherein a portion of at least one of the plurality of non-volatile two-terminal cross-point memory arrays is operative as a scratch pad for the processing unit.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2014
From: UNITY SEMICONDUCTOR CORPORATION
To: III HOLDINGS 1, LLC
Reel/Frame 032606/0079 →
RELEASE OF SECURITY INTEREST Recorded Dec 12, 2013
From: SILICON VALLEY BANK; GOLD HILL VENTURE LENDING 03, LP
To: UNITY SEMICONDUCTOR CORPORATION
Reel/Frame 031774/0280 →
CORRECTION TO THE RECORDATION COVER SHEET OF THE INTELLECTUAL PROPERTY SECURITY AGREEMENT RECORDED AT 23129/669 ON 4/13/2009 Recorded Dec 12, 2013
From: UNITY SEMICONDUCTOR CORPORATION
To: SILICON VALLEY BANK; GOLD HILL VENTURE LENDING 03, LP
Reel/Frame 031805/0573 →
RELEASE Recorded Apr 9, 2012
From: SILICON VALLEY BANK; GOLD HILL CAPITAL
To: UNITY SEMICONDUCTOR, INC.
Reel/Frame 028132/0675 →
SECURITY AGREEMENT Recorded Apr 13, 2009
From: UNITY SEMICONDUCTOR CORPORATION
To: GOLD HILL CAPITAL
Reel/Frame 023129/0669 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 2, 2007
From: NORMAN, ROBERT
To: UNITY SEMICONDUCTOR CORPORATION
Reel/Frame 019911/0045 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 2, 2007
From: NORMAN, ROBERT
To: UNITY SEMICONDUCTOR CORPORATION
Reel/Frame 019911/0050 →