Resistive memory device with a treated interface
View Patent ↗A multi-resistive state element that uses a treated interface is provided. A memory plug includes at least two electrodes that sandwich a multi-resistive state element. Using different treatments on both electrode/multi-resistive state element interfaces improves the memory properties of the entire memory device.
1. A resistive memory device comprising:
a conductive bottom electrode having a top surface;
a multi-resistive state element having a top surface and a bottom surface, the bottom surface of the multi-resistive state element arranged on top of and in direct physical contact with the top surface of the conductive bottom electrode, the multi-resistive state element having a substantially crystalline layer that, while substantially maintaining its substantially crystalline structure has a modifiable resistance;
a conductive top electrode having a bottom surface and arranged on top of and in direct physical contact with the top surface of the multi-resistive state element, wherein the resistance of the resistive memory device may be changed by applying a first voltage having a first polarity across the conductive electrodes and reversibly changed by applying a second voltage having a second polarity across the conductive electrodes;
a top interface created by the direct physical contact between the bottom surface of the top electrode and the top surface of the multi-resistive state element; and
a bottom interface created by the direct physical contact between the top surface of the bottom electrode and the bottom surface of the multi-resistive state element, at least one of the top interface or the bottom interface includes at least one treatment primarily directed towards changing properties of the at least one interface,
wherein the at least one treatment is an exposure to a gas,
wherein the exposure to the gas causes a chemical reaction in the multi-resistive state material, and
whereby the properties of the at least one interface are changed by the at least one treatment.
2. A resistive memory device comprising:
a conductive bottom electrode having a top surface;
a multi-resistive state element having a top surface and a bottom surface, the bottom surface of the multi-resistive state element arranged on top of and in direct physical contact with the top surface of the conductive bottom electrode, the multi-resistive state element having a substantially crystalline layer that, while substantially maintaining its substantially crystalline structure, has a modifiable resistance;
a conductive top electrode having a bottom surface and arranged on top of and in direct physical contact with the top surface of the multi-resistive state element, wherein the resistance of the resistive memory device may be changed by applying a first voltage having a first polarity across the conductive electrodes and reversibly changed by applying a second voltage having a second polarity across the conductive electrodes;
a top interface created by the direct physical contact between the bottom surface of the top electrode and the top surface of the multi-resistive state element; and
a bottom interface created by the direct physical contact between the top surface of the bottom electrode and the bottom surface of the multi-resistive state element, at least one of the top interface or the bottom interface includes at least one treatment primarily directed towards changing properties of the at least one interface,
wherein the at least one treatment is caused by a chemical reaction between one of the conductive electrodes and the multi-resistive state element, and
whereby the properties of the at least one interface are changed by the at least one treatment.
3. The resistive memory device of claim 2 , wherein:
an anneal process is a catalyst for the chemical reaction.
4. The resistive memory device of claim 2 , wherein:
an exposure to a gas is a catalyst for the chemical reaction.
5. A resistive memory device comprising:
a conductive bottom electrode having a top surface;
a multi-resistive state element having a top surface and a bottom surface, the bottom surface of the multi-resistive state element arranged on top of and in direct physical contact with the ton surface of the conductive bottom electrode, the multi-resistive state element having a substantially crystalline layer that, while substantially maintaining its substantially crystalline structure, has a modifiable resistance;
a conductive top electrode having a bottom surface and arranged on top of and in direct physical contact with the top surface of the multi-resistive state element, wherein the resistance of the resistive memory device may be changed by applying a first voltage having a first polarity across the conductive electrodes and reversibly changed by applying a second voltage having a second polarity across the conductive electrodes;
a top interface created by the direct physical contact between the bottom surface of the top electrode and the top surface of the multi-resistive state element; and
a bottom interface created by the direct physical contact between the top surface of the bottom electrode and the bottom surface of the multi-resistive state element, at least one of the top interface or the bottom interface includes at least one treatment primarily directed towards changing properties of the at least one interface,
wherein the at least one treatment is caused by a bombardment by inert ions, and
whereby the properties of the at least one interface are changed by the at least one treatment.
6. The resistive memory device of claim 1 , wherein:
the substantially crystalline layer is fabricated to be polycrystalline.
7. The resistive memory device of claim 1 , wherein:
the substantially crystalline layer is fabricated to be a perovskite.
8. The resistive memory device of claim 7 , wherein:
the treatment, to which the at least one interface is subjected, is directed towards changing properties of the perovskite.