Combined memories in integrated circuits

1. A non-transitory computer readable medium having program instructions configured to execute on and cause a computer system to perform a method of designing an application specific integrated circuit (ASIC) having vertically integrated non-Flash re-writeable non-volatile memory, comprising the steps of:

determining a first requirement for logic blocks included in a logic plane fabricated on a silicon substrate, at least a portion of the logic blocks operative to perform data operations on a plurality of non-volatile re-writeable resistivity-sensitive two-terminal memory elements configured in one or more two-terminal cross-point memory arrays that are electrically coupled with the logic blocks;

determining a second requirement for memory blocks including determining a vertical configuration for the memory blocks, the memory blocks are positioned in one or more memory planes in contact with and fabricated directly above the silicon substrate, each memory plane including at least one of the two-terminal cross-point memory arrays, and the one or more memory planes are vertically stacked upon one another according to the vertical configuration;

compiling a design for fabricating an integrated circuit (IC) that includes the memory blocks in contact with and vertically, fabricated directly above the silicon substrate using the first requirement and the second requirement; and

outputting the design for the IC in at least one non-transitory computer readable medium.

2. The method of claim 1 and further comprising:

performing a first pass layout using the first requirement; and

evaluating memory usage based on the first pass layout,

wherein the compiling the design for fabricating the IC considers the evaluating.

3. The method of claim 1 , wherein the determining the first requirement comprises determining a type and a first number of logic blocks for the IC.

4. The method of claim 3 , wherein the determining the second requirement comprises determining a second number of non-volatile re-writeable memory blocks and determining a third number of memory planes needed for the second number of non-volatile re-writeable memory blocks.

5. The method of claim 4 and further comprising:

determining the third number of memory planes and a memory density for the memory blocks based on a die area of the IC and the second number of non-volatile re-writeable memory blocks.

6. The method of claim 1 , wherein the determining the second requirement for memory blocks comprises determining an amount of memory for random access memory (RAM) emulation and an amount of memory for Flash memory emulation.

7. The method of claim 1 , wherein the compiling the design for the IC comprises designing an electrically conductive interconnect structure between a memory logic included in the logic blocks of the logic plane and the memory blocks.

8. The method of claim 1 , wherein determining the first requirement for logic blocks comprises receiving design parameters and generating interface circuitry, address decoder logic, data buffers, and sense amplifiers from the design parameters.

9. A computer program product embodied in a non-transitory computer readable medium and configured to execute on and cause a computer system to perform a method of designing an application specific integrated circuit (ASIC) having vertically integrated non-Flash re-writeable non-volatile memory, comprising the steps of:

determining a first requirement for logic blocks to be fabricated in a logic plane of a silicon substrate;

determining a second requirement for memory blocks including determining a vertical configuration for one or more memory planes the memory blocks are configured in, the one or more memory planes are in contact with and are fabricated directly above the silicon substrate with the memory blocks in electrical communication with at least a portion of the logic blocks;

compiling a design for fabricating an integrated circuit (IC) using the first requirement and the second requirement; and

outputting the design for the IC in at least one non-transitory computer readable medium.

10. The computer program product of claim 9 and further comprising:

performing a first pass layout using the first requirement; and

evaluating memory usage based on the first pass layout, wherein the compiling the design for fabricating the IC considers the evaluating.

11. The computer program product of claim 9 , wherein the determining the first requirement comprises determining a type and a first number of logic blocks for the IC.

12. The computer program product of claim 11 , wherein the determining the second requirement comprises determining a second number of non-volatile re-writeable memory blocks and determining a third number of memory planes needed for the second number of non-volatile re-writeable memory blocks.

13. A non-transitory computer readable medium having program instructions configured to execute on and cause a computer system to perform a method of designing an application specific integrated circuit (ASIC) having vertically integrated non-Flash re-writeable non-volatile memory, comprising the steps of:

determining a first requirement including a number and type of logic blocks to be fabricated in a logic plane of a silicon substrate for an integrated circuit (IC);

determining a second requirement including a number and type of memory blocks for the IC;

performing a first pass layout using the first requirement and evaluating memory usage based on the first pass layout;

correlating memory planes for the IC based on the second requirement, each memory plane including at least one of the memory blocks, and the memory planes are in contact with and are fabricated directly above the silicon substrate and the memory blocks are electrically coupled with at least a portion of the logic blocks;

compiling a design for fabricating the IC based on the evaluating and the correlating; and

outputting the design for the IC in at least one non-transitory computer readable medium.