IP Library Granted Patent US 6,875,652
Granted Patent B2
US 6,875,652 · App. 10/638,594 · Granted Apr 5, 2005

Method for producing ferroelectric capacitors and integrated semiconductor memory chips

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Quick Facts
Patent No.
US 6,875,652
App. No.
10/638,594
Granted
Apr 5, 2005
Kind
B2
Abstract

The invention relates to a method for producing ferroelectric capacitors that are structured using the stack principle and that are used in integrated semiconductor memory chips. The individual capacitor modules have an oxygen barrier between a lower capacitor electrode and an electrically conductive plug. At a site where it is not covered by the corresponding oxygen barrier, an unstructured adhesive layer is oxidized by the oxygen arising during the tempering process of the ferroelectric and forms insulating segments at the site in such a way that the lower capacitor electrodes of the ferroelectric capacitors are electrically insulated from one another. This makes it possible to dispense with structuring the adhesive layer. Furthermore, the layer serves as a getter of oxygen and inhibits the diffusion of oxygen to the plug.

Claims (10)

1. A method for producing ferroelectric capacitors in an integrated semiconductor memory chip, the method which comprises:

constructing the ferroelectric capacitors in accordance with a stacked principle;

forming an oxygen barrier between a metallic bottom capacitor electrode of a ferroelectric capacitor and a conductive plug connecting the bottom capacitor electrode to a semiconductor electrode lying below the ferroelectric capacitor or to a metallization track;

configuring an unpatterned adhesion layer made of a conductive material in a region having the ferroelectric capacitors and configuring the adhesion layer between the plug and the oxygen barrier; and

performing a heat treatment step to oxidize sections of the adhesion layer that are not covered by the oxygen barrier and to thereby convert the sections of the adhesion layer into an insulating layer.

2. The production method according to claim 1 , wherein the heat treatment step is performed for depositing a ferroelectric of the ferroelectric capacitors.

3. The production method according to claim 1 , wherein the adhesion layer contains Ta.

4. The production method according to claim 1 , which comprises making the conductive plug from polysilicon or tungsten.

5. The production method according to claim 1 , wherein the sections of the adhesion layer that are oxidized also extend under edge regions of the oxygen barrier.

6. The production method according to claim 1 , wherein the ferroelectric capacitors form an operative part of the integrated semiconductor memory chip.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2015
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 036723/0021 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2015
From: QIMONDA AG
To: INFINEON TECHNOLOGIES AG
Reel/Frame 035623/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 12, 2010
From: INFINEON TECHNOLOGIES AG
To: QIMONDA AG
Reel/Frame 023768/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 3, 2004
From: KASKO, IGOR; KROENKE, MATTHIAS; MIKOLAJICK, THOMAS
To: INFINEON TECHNOLOGIES AG
Reel/Frame 016039/0209 →