IP Library Granted Patent US 7,088,009
Granted Patent B2
US 7,088,009 · App. 10/644,163 · Granted Aug 8, 2006

Wirebonded assemblage method and apparatus

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Quick Facts
Patent No.
US 7,088,009
App. No.
10/644,163
Granted
Aug 8, 2006
Kind
B2
Abstract

A system ( 10 ) is disclosed having a circuit portion ( 18,26,36 ) containing more than electrical conductors and a wirebonded assemblage ( 12,14,16 ) overlying the circuit portion ( 18,26,36 ). The wirebonded assemblage ( 12,14,16 ) comprises a plurality of wirebonded wires (( 50,52 ),( 60,64 ),( 66,68 )), each of the plurality of wirebonded wires being electrically coupled. The wirebonded assemblage ( 12,14,16 ) provides electrical shielding for the circuit portion ( 18,26,36 ). In one embodiment, the wirebonded assemblage provides for heat spreading.

Claims (38)

1. A system, comprising:

a circuit portion, containing more than electrical conductors; and

a wirebonded assemblage, overlying the circuit portion,

wherein the wirebonded assemblage comprises a plurality of wirebonded wires,

wherein each of the plurality of wirebonded wires are electrically coupled,

wherein the wirebonded assemblage provides electrical shielding for the circuit portion, and

wherein a first one of the plurality of wirebonded wires is neither parallel nor perpendicular to a second one of the plurality of wirebonded wires.

2. A system as in claim 1 , wherein the circuit portion comprises at least one of an active component and a passive component.

3. A system as in claim 1 , wherein the circuit portion comprises at least a portion of an integrated circuit.

4. A system as in claim 1 , wherein the plurality of wirebonded wires comprise at least five wirebonded wires.

5. A system as in claim 1 , wherein the circuit portion has a non-linear geometry.

6. A system as in claim 1 , wherein the circuit portion is located in a cavity of a substrate.

7. A system as in claim 1 , wherein the wirebonded assemblage provides heat spreading for the circuit portion.

8. A system as in claim 1 , wherein at least one of the plurality of wirebonded wires is coupled to a predetermined voltage level.

9. A system as in claim 8 , wherein the predetermined voltage level is approximately ground.

10. A system as in claim 1 , further comprising:

a second circuit portion, overlying the wirebonded assemblage.

11. A system as in claim 10 , wherein the second circuit portion is electrically coupled to the wirebonded assemblage.

12. A system as in claim 1 , wherein at least one of the plurality of wirebonded wires is not wirebonded to the circuit portion.

13. A system as in claim 1 , further comprising:

a second plurality of wirebonded wires electrically coupled to the circuit portion for communicating electrical signals.

14. A system as in claim 1 , further comprising:

a conductive layer underlying the circuit portion, wherein the conductive layer is electrically coupled to the wirebonded assemblage to encapsulate the circuit portion.

15. A method for forming a wirebonded assemblage, comprising:

providing a circuit portion having at least one of an active component and a passive component;

wirebonding a plurality of wirebonded wires overlying the least one of the active component and the passive component;

electrically coupling the plurality of wirebonded wires; and

electrically shielding the least one of the active component and the passive component using the plurality of wirebonded wires.

16. A method as in claims 15 , wherein an attachment point for a first end of each of the plurality of wirebonded wires is overlying an active area of the circuit portion.

17. A system as in claim 15 , wherein the circuit portion comprises an integrated circuit and wherein at least one of the plurality of wirebonded wires overlies at least two edges of the circuit portion.

18. A system, comprising:

a circuit portion, containing more than electrical conductors;

a first plurality of wirebonded wires, overlying any two edges of the circuit portion; and

a second plurality of wirebonded wires, overlying any two edges of the circuit portion;

wherein the first plurality of wirebonded wires and the second plurality of wirebonded wires are electrically coupled, and

wherein the first plurality of wirebonded wires and the second plurality of wirebonded wires are used to provide electrical shielding for the circuit portion, and

wherein the first plurality of wirebonded wires is neither parallel nor perpendicular to the second plurality of wirebonded wires.

19. A system as in claim 18 , wherein the circuit portion comprises an integrated circuit.

Assignments (21)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
323.01(C) ASSIGNMENT OR CHANGE OF NAME IMPROPERLY FILED AND RECORDED BY ANOTHER PERSON AGAINST OWNER'S PATENT Recorded Oct 3, 2019
From: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 052459/0656 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2017
From: NORTH STAR INNOVATIONS INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 041717/0736 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NORTH STAR INNOVATIONS INC.
Reel/Frame 037694/0264 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Feb 2, 2007
From: FREESCALE SEMICONDUCTOR, INC.; FREESCALE ACQUISITION CORPORATION; FREESCALE ACQUISITION HOLDINGS CORP.; FREESCALE HOLDINGS (BERMUDA) III, LTD.
To: CITIBANK, N.A. AS COLLATERAL AGENT
Reel/Frame 018855/0129 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2004
From: MOTOROLA, INC
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 015360/0718 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 20, 2003
From: HAGEN, DEBORAH A.
To: MOTOROLA, INC.
Reel/Frame 014419/0030 →