IP Library Granted Patent US 7,109,099
Granted Patent B2
US 7,109,099 · App. 10/688,047 · Granted Sep 19, 2006

End of range (EOR) secondary defect engineering using substitutional carbon doping

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Quick Facts
Patent No.
US 7,109,099
App. No.
10/688,047
Granted
Sep 19, 2006
Kind
B2
Abstract

A method for incorporating carbon into a wafer at the interstitial a-c silicon interface of the halo doping profile is achieved. A bulk silicon substrate is provided. A carbon-doped silicon layer is deposited on the bulk silicon substrate. An epitaxial silicon layer is grown overlying the carbon-doped silicon layer to provide a starting wafer for the integrated circuit device fabrication. An integrated circuit device is fabricated on the starting wafer by the following steps. A gate electrode is formed on the starting wafer. LDD and source and drain regions are implanted in the starting wafer adjacent to the gate electrode. Indium is implanted to form halo implants adjacent to the LDD regions and underlying the gate electrode wherein the halo implants extend to an interface between the epitaxial silicon layer and the carbon-doped silicon layer wherein carbon ions in the carbon-doped silicon layer act as a silicon interstitial sink for silicon interstitials formed by the halo implants to prevent end of range secondary defect formation.

Claims (44)

1. A method of fabricating an integrated circuit device comprising:

providing a bulk silicon substrate;

depositing a carbon-doped silicon layer on said bulk silicon substrate;

growing an epitaxial silicon layer overlying said carbon-doped silicon layer to provide a starting wafer for integrated circuit fabrication; and

fabricating said integrated circuit device on said starting wafer by the steps comprising:

forming a gate electrode on said starting wafer;

implanting LDD regions within said epitaxial silicon layer adjacent to said gate electrode;

implanting source and drain regions within said epitaxial silicon layer adjacent to said gate electrode and extending through said carbon-doped silicon layer into said bulk silicon substrate; and

implanting a heavy ion to form halo implants within said epitaxial silicon layer adjacent to said LDD regions and underlying said gate electrode wherein said halo implants extend downward through said epitaxial silicon layer to an interface between said epitaxial silicon layer and said carbon-doped silicon layer.

2. The method according to claim 1 wherein said carbon-doped silicon layer is deposited by reduced pressure chemical vapor deposition.

3. The method according to claim 1 wherein said carbon-doped silicon layer has a thickness of between about 100 and 200 Angstroms.

4. The method according to claim 1 wherein said carbon-doped silicon layer has a carbon content of up to 0.5% atomic percent.

5. The method according to claim 1 wherein said epitaxial silicon layer has a thickness of between about 300 and 400 Angstroms.

6. The method according to claim 1 wherein carbon ions in said carbon-doped silicon layer act as a silicon interstitial sink for silicon interstitials formed by said halo implants to prevent end of range secondary defect formation.

7. The method according to claim 1 wherein said heavy ions comprise antimony or indium.

8. A method of fabricating an integrated circuit device comprising:

providing a bulk silicon substrate;

depositing a carbon-doped silicon layer on said bulk silicon substrate;

growing an epitaxial silicon layer overlying said carbon-doped silicon layer to provide a starting wafer for said integrated circuit device fabrication; and

fabricating said integrated circuit device on said starting wafer by the steps comprising:

forming a gate electrode on said starting wafer;

implanting LDD regions in said starting wafer adjacent to said gate electrode;

implanting source and drain regions within said epitaxial silicon layer adjacent to said gate electrode and extending through said carbon-doped silicon layer into said bulk silicon substrate; and

implanting antimony or indium ions within said epitaxial silicon layer to form halo implants adjacent to said LDD regions and underlying said gate electrode wherein said halo implants extend downward through said epitaxial silicon layer to an interface between said epitaxial silicon layer and said carbon-doped silicon layer.

9. The method according to claim 8 wherein said carbon-doped silicon layer is deposited by chemical vapor deposition.

10. The method according to claim 8 wherein said carbon-doped silicon layer is deposited by reduced pressure chemical vapor deposition.

11. The method according to claim 8 wherein said carbon-doped silicon layer has a thickness of between about 100 and 700 Angstroms.

12. The method according to claim 8 wherein said carbon-doped silicon layer has a carbon content of up to 0.5% atomic percent.

13. The method according to claim 8 wherein said epitaxial silicon layer has a thickness of between about 300 and 500 Angstroms.

14. The method according to claim 8 wherein carbon ions in said carbon-doped silicon layer act as a silicon interstitial sink for silicon interstitials formed by said halo implants to prevent end of range secondary defect formation.

15. A method of fabricating an integrated circuit device comprising:

providing a bulk silicon substrate;

depositing a carbon-doped silicon layer on said bulk silicon substrate;

growing an epitaxial silicon layer overlying said carbon-doped silicon layer to provide a starting wafer for said integrated circuit device fabrication; and

fabricating said integrated circuit device on said starting wafer by the steps comprising:

forming a gate electrode on said starting wafer;

implanting LDD regions within said epitaxial silicon layer adjacent to said gate electrode;

implanting source and drain regions within said epitaxial silicon layer adjacent to said gate electrode and extending through said carbon-doped silicon layer into said bulk silicon substrate; and

implanting heavy ions to form halo implants within said epitaxial silicon layer adjacent to said LDD regions and underlying said gate electrode wherein said halo implants extend downward through said epitaxial silicon layer to an interface between said epitaxial silicon layer and said carbon-doped silicon layer wherein carbon ions in said carbon-doped silicon layer act as a silicon interstitial sink for silicon interstitials formed by said halo implants to prevent end of range secondary defect formation.

16. The method according to claim 15 wherein said carbon-doped silicon layer is deposited by reduced pressure chemical vapor deposition.

17. The method according to claim 15 wherein said carbon-doped silicon layer has a thickness of between about 100 and 700 Angstroms.

18. The method according to claim 15 wherein said carbon-doped silicon layer has a carbon content of up to 0.5% atomic percent.

19. The method according to claim 15 wherein said epitaxial silicon layer has a thickness of between about 300 and 500 Angstroms.

20. The method according to claim 15 wherein said heavy ions comprise antimony or indium.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2020
From: ALSEPHINA INNOVATIONS, INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 053351/0839 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2019
From: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
To: ALSEPHINA INNOVATIONS INC.
Reel/Frame 049669/0775 →
CHANGE OF NAME Recorded Nov 20, 2018
From: CHARTERED SEMICONDUCTOR MANUFACTURING PTE. LTD.
To: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
Reel/Frame 047614/0081 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2003
From: TAN, CHUNG FOONG; LIU, JINPING; LEE, HYEOK JAE; INDAJANG, BANGUN; CHOR, ENG FONG; ONG, SHIANG YANG
To: CHARTERED SEMICONDUCTOR MANUFACTURING LTD.
Reel/Frame 014618/0055 →