Hardware for performing an arithmetic function
View Patent ↗A circuit for performing an arithmetic function on a number performs the function using successive approximation. Each approximation produces an estimate of the result. A determination of the utility of this estimate is made by comparing the inverse function of a given estimate to the number. The current estimate is updated based on this comparison and the inverse function of the current estimate is stored. The next estimate is an incremental change from the previous estimate and there is a corresponding incremental change in the inverse function from the current estimate to the next estimate. Rather than calculating the whole inverse function, which would typically require a multiplier, only the incremental change in the inverse function is provided simply. The incremental change in the inverse function is then added to the inverse function of the current estimate and compared to the number for determining the utility of the next estimate.
1. A high speed circuit for performing an arithmetic function comprising one of a group consisting of division and square root applied to a number and provide a result of the arithmetic function based on partial iterations, comprising:
a counter for providing a count to identify a current partial iteration;
a comparator having a first input for receiving the number, a second input, and an output;
register means for storing a current estimate of the result of the arithmetic function as applied to the number based on previous partial iterations, for providing an output representative of a next partial iteration, and for updating the result based on the output of the comparator, wherein the register means has a first input coupled to the output of the comparator, a second input coupled to the counter, and an output;
storage means for storing an inverse of the arithmetic function of the current estimate and having an output on which is provided the inverse of the arithmetic function of the current estimate of the result;
incremental means having an input coupled to the output of the register means for providing, on an output, an incremental effect, wherein the incremental effect is a value that when added to the inverse of the mathematical function of the current estimate is equal to the inverse function of a next current estimate plus the next partial iteration; and
summing means, having an output coupled to the second input of the comparator, a first input coupled to the output of the storage means, a second input coupled to the incremental means, for providing on the output a sum of the incremental effect and the inverse of the arithmetic function of the current estimate.
2. The circuit of claim 1 , wherein the arithmetic function is division by a divisor.
3. The circuit of claim 2 , wherein the incremental means comprises:
a programmable shifter having a first input for receiving the divisor, a second input for receiving a signal indicating a shift amount, and an output coupled to the summing means.