IP Library Granted Patent US 7,005,385
Granted Patent B2
US 7,005,385 · App. 10/734,593 · Granted Feb 28, 2006

Method for removing a resist mask with high selectivity to a carbon hard mask used for semiconductor structuring

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Quick Facts
Patent No.
US 7,005,385
App. No.
10/734,593
Granted
Feb 28, 2006
Kind
B2
Abstract

The present invention relates to a method for removing a resist selective to a carbon hard mask including providing an etching plasma comprising of at least hydrogen at a predetermined temperature level and a predetermined pressure level in a reaction chamber, and etching the resist selectively to the mask with said plasma for a predetermined period of time.

Claims (15)

1. A method for removing a resist from a SiON liner on a hard mask constituted mostly of carbon on a semiconductor substrate, comprising:

providing an etching plasma comprising at least hydrogen at a predetermined temperature level and a predetermined pressure level in a reaction chamber; and

etching the resist selectively to the mask with the plasma for a predetermined period of time.

2. The method according to claim 1 , wherein the etching plasma comprises of a predetermined amount of nitrogen as a diluent.

3. The method according to claim 2 , wherein a ratio of nitrogen to hydrogen is varied starting from a standard nitrogen to hydrogen mixture of 96:4 to a stronger hydrogen rich chemistry based on an intended application.

4. The method according to claim 1 , wherein the etching plasma is comprised of a predetermined amount of CF 4 .

5. The method according to claim 4 , wherein the predetermined amount is less than 5 per cent.

6. The method according to claim 1 , wherein the etching plasma is free of oxygen.

7. The method according to claim 1 , wherein the predetermined pressure level of the etching plasma is in the range of 50 to 300 Pa.

8. The method according to claim 1 , wherein the predetermined temperature is in the range of 150° C. to 350° C.

9. The method according to claim 1 , wherein the resist is a carbon-based photo resist.

10. The method according to claim 1 , wherein the semiconductor substrate is a Si-substrate.

11. The method according to claim 1 , wherein the resist has a selectivity to the mask equal or higher than 10.

12. The method according to claim 1 , wherein the resist is stripped with an across wafer non-uniformity of <3% one sigma.

13. The method according to claim 1 , wherein the resist is stripped completely from the surface of the semiconductor substrate.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2015
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 036888/0745 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2015
From: QIMONDA AG
To: INFINEON TECHNOLOGIES AG
Reel/Frame 035623/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 15, 2010
From: INFINEON TECHNOLOGIES AG
To: QIMONDA AG
Reel/Frame 023853/0001 →