Method for configuring multiple-output phase-locked loop frequency synthesizer

1. A method of configuring a multiple-output phase-locked loop frequency synthesizer having a VCO and set of output dividers that divide the VCO output frequency, comprising:

providing a desired set of output frequencies;

determining one or more candidate VCO output frequencies and corresponding output divider configurations based upon the desired set of output frequencies, each candidate VCO output frequency and corresponding output divider configuration determining a set of potential synthesized output frequencies;

for each candidate VCO output frequency, determining a corresponding feedback frequency from the set of potential synthesized output frequencies, wherein each combination of a candidate VCO output frequency and the corresponding output divider configuration determines a potential configuration of the frequency synthesizer; and

testing the suitability of at least one of the potential configurations based upon predetermined suitability criteria, wherein the testing comprises at least one of the following:

determining how closely the candidate VCO output frequency matches a desired VCO output frequency; and

determining how closely the set of potential synthesized output frequencies matches the desired set of output frequencies.

2. The method of claim 1 , wherein determining a corresponding feedback frequency includes selecting a frequency from the set of potential synthesized output frequencies.

3. The method of claim 1 , wherein the multiple-output phase-locked loop frequency synthesizer includes a feedback divisor, and determining a corresponding feedback frequency includes configuring the feedback divisor to divide a feedback signal to provide feedback frequency.

4. The method of claim 1 , wherein the multiple-output phase-locked loop frequency synthesizer includes an input signal divisor, and determining a corresponding feedback frequency includes configuring the input signal divisor to divide an input signal to provide a desired input frequency to the VCO.

5. A machine-readable medium having stored thereon data representing instructions that, when executed by a processor, perform the method of claim 1 .

6. A method of configuring a multiple-output phase-locked loop frequency synthesizer, comprising:

providing a desired set of output frequencies;

determining a candidate output frequency(s) for the VCO and corresponding configuration for each output divider based upon the desired set of output frequencies, each candidate output frequency for the VCO and corresponding configuration for the output dividers determining a set of potential synthesized output frequencies;

for each candidate output frequency(s) and corresponding configuration for each output divider, determining a corresponding feedback frequency from the set of potential synthesized output frequencies and a configuration for the synthesizer's input and feedback divisors, wherein each combination of a candidate output frequency and the corresponding configuration for the output dividers, selection of a feedback frequency, and configuration for the feedback and input dividers determines a potential configuration of the frequency synthesizer; and

testing the suitability of at least one of the potential configurations based upon predetermined suitability criteria, wherein the testing comprises determining how closely the set of potential synthesized output frequencies matches the desired set of output frequencies.

7. The method of claim 6 , wherein the determining a candidate frequency act comprises determining candidate output frequency(s) for the VCO and corresponding configuration for each output divider such that each synthesized frequency exactly matches the corresponding desired output frequency.

8. The method of claim 7 , wherein the determining a candidate frequency act comprises determining candidate output frequency(s) for the VCO and corresponding configuration for each output divider such that each synthesized frequency exactly matches or approximates the corresponding desired output frequency.

9. The method of claim 7 , wherein the determining a candidate frequency act comprises determining candidate output frequency(s) for the VCO and corresponding configuration for each output divider such that the number of synthesized frequencies that exactly match the corresponding desired output frequency is maximized.

10. The method of claim 6 , wherein the determining a feedback signal and a configuration for the synthesizer's input and feedback divisors act comprises:

sequentially selecting a frequency from the set of potential synthesized output frequencies;

assigning the feedback frequency to the selected frequency;

based upon the assigned feedback frequency, determining a divisor M for the input divider and a divisor N such that a first ratio equaling the input reference frequency/M and a second ratio equaling the assigned feedback frequency/N satisfy a predetermined condition.

11. The method of claim 10 , wherein M and N are integers.

12. The method of claim 11 , wherein the predetermined condition is the first ratio equals the second ratio.

13. The method of claim 11 , wherein the predetermined condition is the first ratio is within an acceptable tolerance of the second ratio.

14. The method of claim 6 , wherein testing the suitability of at least one of the potential configurations based upon predetermined suitability criteria act comprises determining how closely the candidate VCO output frequency matches a desired VCO output frequency.

15. The method of claim 10 , wherein testing the suitability of at least one of the potential configurations based upon predetermined suitability criteria act comprises determining how closely the first and second ratios match a desired input frequency for the phase detector.

16. A machine-readable medium having stored thereon data representing instructions that when executed by a processor, the instructions adapt the processor to perform a method of configuring a multiple-output phase-locked loop frequency synthesizer, comprising:

providing a desired set of output frequencies;

determining a candidate output frequency(s) for the VCO and corresponding configuration for each output divider based upon the desired set of output frequencies, each candidate output frequency for the VCO and corresponding configuration for the output dividers determining a set of potential synthesized output frequencies;

for each candidate output frequency(s) and corresponding configuration for each output divider, determining a corresponding feedback frequency from the set of potential synthesized output frequencies and a configuration for the synthesizer's input and feedback divisors, wherein each combination of a candidate output frequency and the corresponding configuration for the output dividers, selection of a feedback frequency, and configuration for the feedback and input dividers determines a potential configuration of the frequency synthesizer; and

testing the suitability of at least one of the potential configurations based upon predetermined suitability criteria, wherein the stored data is such that the testing comprises determining how closely the candidate VCO output frequency matches a desired VCO output frequency.

17. The machine-readable medium of claim 16 , wherein the stored data is such that the determining a candidate frequency act comprises determining candidate output frequency(s) for the VCO and corresponding configuration for each output divider such that each synthesized frequency exactly matches the corresponding desired output frequency.

18. The machine-readable medium of claim 17 , wherein the stored data is such that the determining a candidate frequency act comprises determining candidate output frequency(s) for the VCO and corresponding configuration for each output divider such that each synthesized frequency exactly matches or approximates the corresponding desired output frequency.

19. The machine-readable medium of claim 16 , wherein the stored data is such that the determining a candidate frequency act comprises determining candidate output frequency(s) for the VCO and corresponding configuration for each output divider such that the number of synthesized frequencies that exactly match the corresponding desired output frequency is maximized.

20. The machine-readable medium of claim 16 , wherein the stored data is such that the determining a feedback signal and a configuration for the synthesizer's input and feedback divisors act comprises:

sequentially selecting a frequency from the set of potential synthesized output frequencies;

assigning the feedback frequency to the selected frequency;

based upon the assigned feedback frequency, determining a divisor M for the input divider and a divisor N such that a first ratio equaling the input reference frequency/M and a second ratio equaling the assigned feedback frequency/N satisfy a predetermined condition.

21. The machine-readable medium of claim 20 , wherein the stored data is such that M and N are integers.

22. The machine-readable medium of claim 21 , wherein the stored data is such that the predetermined condition is the first ratio equals the second ratio.

23. The machine-readable medium of claim 21 , wherein the stored data is such that the predetermined condition is the first ratio is within an acceptable tolerance of the second ratio.

24. The machine-readable medium of claim 16 , wherein the stored data is such that testing the suitability of at least one of the potential configurations based upon predetermined suitability criteria comprises determining how closely the set of potential synthesized output frequencies matches the desired set of output frequencies.