CMOS active pixel with hard and soft reset

1. A circuit for a pixel site in an imaging array, comprising:

a pixel to convert incident light to an electrical signal;

a row line to read out a voltage from said pixel;

a row line transistor, operatively connected between one end of said row line and a predetermined voltage, to reset a voltage associated with said row line; and

a reset voltage generator, operatively connected to said row line transistor, to generate reset pulses;

said reset voltage generator generating a first reset pulse before a beginning of an integration period of said pixel;

said reset voltage generator generating a second reset pulse after generating said first reset pulse, the generation of the second reset pulse being at an end of the integration period of said pixel.

2. The circuit as claimed in claim 1 , wherein said pixel comprising:

a light-detecting element to convert incident light to a photocurrent;

a reset transistor, operatively connected to said light-detecting element, to reset a voltage associated with said light-detecting element; and

a pixel reset voltage generator, operatively connected to a non-gate terminal of said reset transistor, to generate a reset voltage;

said pixel reset voltage generator generating a first pixel reset voltage;

said pixel reset voltage generator generating a second pixel reset voltage after generating said first pixel reset voltage.

3. The circuit as claimed in claim 1 , wherein said predetermined voltage is ground.

4. The circuit as claimed in claim 2 , wherein said pixel further comprising:

a transistor;

said transistor having a gate thereof operatively connected to said light-detecting element;

said transistor having a non-gate terminal thereof operatively connected to said pixel reset voltage generator.

5. The circuit as claimed in claim 2 , wherein said pixel further comprising:

a transistor;

said transistor having a gate thereof operatively connected to said light-detecting element;

said transistor having a non-gate terminal thereof operatively connected to a voltage source.

6. The circuit as claimed in claim 2 , wherein said first pixel reset voltage has a value to drive said reset transistor to operate in a triode region.

7. A method for measuring a pixel voltage using a row line, comprising:

(a) hard resetting the row line voltage to a first predetermined voltage;

(b) soft resetting the row line voltage to a first pixel voltage;

(c) hard resetting the row line voltage to a second predetermined voltage;

(d) soft resetting the row line voltage to a second pixel voltage; and

(e) determining a difference between the first and second pixel voltages, the difference being the measured pixel voltage.

8. The method as claimed in claim 7 , wherein the first predetermined voltage is equal to the second predetermined voltage.

9. The method as claimed in claim 7 , wherein the first predetermined voltage is ground.

10. The method as claimed in claim 7 , wherein the second predetermined voltage is ground.

11. The method as claimed in claim 7 , wherein the first and second predetermined voltages are ground.

12. The method as claimed in claim 7 , wherein the first pixel voltage is a pixel reset voltage and the second pixel voltage is a pixel integrated voltage.

13. The method as claimed in claim 7 , wherein the second pixel voltage is a pixel reset voltage and the first pixel voltage is a pixel integrated voltage.

14. The method as claimed in claim 7 , further comprising:

(f) generating a hard reset of a voltage associated with a light-detecting element of the pixel to reset the voltage associated with the light-detecting element; and

(g) generating a soft reset of the voltage associated with the light-detecting element, after generating the hard reset, to reset the voltage associated with the light-detecting element.

15. A method for measuring a pixel voltage using a row line, the row line including a row line transistor, comprising:

(a) turning ON the row line transistor to bring the row line to a first predetermined voltage level;

(b) turning ON a column select transistor associated with the pixel and turning OFF row line transistor to bring the row line voltage up to a pixel voltage level;

(c) capturing a first voltage value on the row line;

(d) turning ON the row line transistor to bring the row line to a second predetermined voltage level;

(e) turning ON a column select transistor associated with the pixel and turning OFF row line transistor to bring the row line voltage up to a pixel voltage level;

(f) capturing a second voltage value on the row line; and

(g) determining a difference between the first and second captured voltage values, the difference being the measured pixel voltage.

16. The method as claimed in claim 15 , wherein the first predetermined voltage is equal to the second predetermined voltage.

17. The method as claimed in claim 15 , wherein the first predetermined voltage is ground.

18. The method as claimed in claim 15 , wherein the second predetermined voltage is ground.

19. The method as claimed in claim 15 , wherein the first and second predetermined voltages are ground.

20. The method as claimed in 15 , wherein the first voltage value is a pixel reset voltage and the second voltage value is a pixel integrated voltage.

21. The method as claimed in 15 , wherein the second voltage value is a pixel reset voltage and the first voltage value is a pixel integrated voltage.