IP Library Granted Patent US 7,213,111
Granted Patent B1
US 7,213,111 · App. 10/789,667 · Granted May 1, 2007

Method and apparatus for determining precedence in a classification engine

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Quick Facts
Patent No.
US 7,213,111
App. No.
10/789,667
Granted
May 1, 2007
Kind
B1
Abstract

A precedence determination system including a first type memory bank configured to receive a first search signal and to provide first search result indications, a second type memory bank configured to receive a second search signal and to provide second search result indications, a precedence number table coupled to the first and second type memory banks and configured to provide programmable precedence numbers, and a precedence determination circuit coupled to the first and second type memory banks and the precedence number table and configured to provide a third search result indication is disclosed. In one embodiment, the first type memory bank can be a static random access memory (SRAM) and the second type memory bank can be a ternary content addressable memory (TCAM).

Claims (55)

1. A precedence determination system, comprising:

a first type memory bank receiving a first search signal and providing a plurality of first search result indications;

a second type memory bank receiving a second search signal and providing a plurality of second search result indications;

a precedence number table coupled to the first and second type memory banks and configured providing a plurality of programmable precedence numbers; and

a precedence determination circuit coupled to the first and second type memory banks and the precedence number table and configured providing a third search result indication.

2. The precedence determination system of claim 1 , wherein:

the first type memory bank includes static random access memory (SRAM).

3. The precedence determination system of claim 2 , wherein:

the first type memory bank includes a plurality of entries.

4. The precedence determination system of claim 3 , wherein:

each of the plurality of entries is configured to select one of the plurality of programmable precedence numbers.

5. The precedence determination system of claim 1 , wherein:

the second type memory bank includes ternary content addressable memory (TCAM).

6. The precedence determination system of claim 5 , wherein:

the first type memory bank includes a plurality of entries.

7. The precedence determination system of claim 6 , wherein:

each of the plurality of entries is configured to select one of the plurality of programmable precedence numbers.

8. The precedence determination system of claim 1 , wherein:

the first search signal includes a hash function signal.

9. The precedence determination system of claim 8 , wherein:

each of the plurality of first search result indications includes a hit or miss indication in response to the hash function signal.

10. The precedence determination system of claim 1 , wherein:

the second search signal includes a search key.

11. The precedence determination system of claim 10 , wherein:

each of the plurality of second search result indications includes at most one hit indication in response to the search key.

12. The precedence determination system of claim 11 , wherein:

the at most one hit indication is provided in response to a physical address based precedence.

13. The precedence determination system of claim 1 , wherein:

the third search result indication includes an overall hit or miss indication.

14. The precedence determination system of claim 13 , wherein:

the overall miss indication includes a default precedence value.

15. A method of determining a precedence, comprising the steps of:

searching a first type memory to provide a plurality of first search results;

searching a second type memory to provide a plurality of second search results;

selecting a plurality of programmable precedence numbers from a precedence number table in response to the first and second search results;

determining a precedence in response to the plurality of programmable precedence numbers; and

providing a third search result.

16. The method of determining the precedence of claim 15 , wherein:

the first type memory includes static random access memory (SRAM).

17. The method of determining the precedence of claim 15 , wherein:

the second type memory includes ternary content addressable memory (TCAM).

18. The method of determining the precedence of claim 15 , wherein:

the steps of searching the first type memory and searching the second type memory are performed substantially in parallel.

19. The method of determining the precedence of claim 15 , wherein:

the third search result includes an overall hit or miss indication.

20. The method of determining the precedence of claim 19 , wherein:

the overall miss indication includes a default precedence value.

21. The method of determining the precedence of claim 15 , wherein:

the plurality of precedence numbers are programmable.

22. A means for determining a precedence, comprising:

a means for searching a first type memory to provide a plurality of first search results;

a means for searching a second type memory to provide a plurality of second search results;

a means for selecting a plurality of precedence numbers from a precedence number table in response to the first and second search results;

a means for determining a precedence in response to the plurality of precedence numbers; and

a means for providing a third search result.

Assignments (10)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0097. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048555/0510 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0097 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2015
From: NETLOGIC I LLC
To: BROADCOM CORPORATION
Reel/Frame 035443/0763 →
CHANGE OF NAME Recorded Apr 16, 2015
From: NETLOGIC MICROSYSTEMS, INC.
To: NETLOGIC I LLC
Reel/Frame 035443/0824 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 11, 2010
From: RMI CORPORATION
To: NETLOGIC MICROSYSTEMS, INC.
Reel/Frame 023926/0338 →
CHANGE OF NAME Recorded May 1, 2008
From: RAZA MICROELECTRONICS, INC.
To: RMI CORPORATION
Reel/Frame 020886/0454 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2004
From: KAO, SOPHIA W.; AGARWAL, PUNEET; GRUNER, FREDERICK R.
To: RAZA MICROELECTRONICS, INC.
Reel/Frame 015038/0040 →