IP Library Granted Patent US 7,266,486
Granted Patent B2
US 7,266,486 · App. 10/806,612 · Granted Sep 4, 2007

Magnetoresistive random access memory simulation

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Quick Facts
Patent No.
US 7,266,486
App. No.
10/806,612
Granted
Sep 4, 2007
Kind
B2
Abstract

A computer model simulation for an MRAM cell. In one example, the MRAM cell includes a magnetic tunnel junctions (MTJ) with multiple free magnetic layers. In one embodiment, the simulation implements a state machine whose states variables transition based on indications of magnetic fields passing thresholds. In one embodiment, the conductance values utilized from the model are derived from measured data that is curve fitted to obtain first and second order polynomial coefficient parameters to be used in the model.

Claims (33)

1. A method for simulating a magnetoresistive memory device in an integrated circuit magnetoresistive random access memory (MRAM) having a first conductor, a second conductor, and a magnetic tunnel junction (MTJ), the first conductor disposed substantially orthogonal to the second conductor, the MTJ disposed between the first conductor and the second conductor, the method comprising:

calculating an indication of a first magnetic field applied to the MTJ, the first magnetic field generated by current in the first conductor;

calculating an indication of a second magnetic field applied to the MTJ, the second magnetic field generated by current in the second conductor;

detecting indications of transitions of the first magnetic field and the second magnetic field across one or more thresholds; and

providing a state machine having one or more state variables with transitions in the state machine being dependent upon detected indications of transitions of the first magnetic field and the second magnetic field and a state of the one or more state variables, wherein state variables of the state machine include:

a state variable indicative of a presence of the first magnetic field above a predetermined threshold;

a state variable indicative of a presence of the second magnetic field above a predetermined threshold;

a state variable indicative of a presence of the first magnetic field above a predetermined threshold preceding a presence of the second magnetic field above a predetermined threshold; and

a state variable indicative of a presence of the second magnetic field above a predetermined threshold preceding a presence of the first magnetic field above a predetermined threshold.

2. The method of claim 1 further comprising:

modeling a conductance value of the MTJ in each of two bit states by using an equation having an equivalent form of G(A+BV+CV 2 ), where G is a conductance value of the MTJ, A, B, and C are zero, first, and second order voltage coefficient parameters, and V is a MTJ bias voltage value.

3. The method of claim 2 further comprising:

utilizing a first set of zero, first, and second order voltage coefficient parameters for the conductance value for a first bit state and utilizing a second set of zero, first, and second order voltage coefficient parameters for the conductance value for a second bit state.

4. The method of claim 2 further comprising

in at least one of the two bit states, utilizing a first set of zero, first, and second order voltage coefficient parameters for the conductance value for a positive MTJ bias voltage and utilizing a second set of zero, first, and second order voltage coefficient parameters for the conductance value for a negative MTJ bias voltage.

5. The method of claim 2 further comprising:

calculating A, B, and C as a function of temperature.

6. The method of claim 2 wherein values of G, A, B, and C are generated by a method comprising:

fitting low resistance state conductance data, high resistance state conductance negative bias voltage data, and high resistance state conductance positive bias voltage data for predetermined temperatures with second order polynomials; and

fitting individual polynomial coefficient parameters to first order temperature polynomials.

7. The method of claim 6 wherein the values of G, A, B, and C are generated by a method further comprising:

adjusting one or more of the individual polynomial coefficient parameters to minimize a total error being measured between the second order polynomials and each of the low resistance state conductance data, the high resistance state conductance negative bias voltage data, and the high resistance state conductance positive bias voltage data.

8. The method of claim 7 wherein the values of G, A, B, and C are generated by a method further comprising:

eliminating one or more of the polynomial coefficient parameters which have a minimal effect on error being measured.

9. The method of claim 1 wherein the MTJ includes multiple free magnetic layers.

10. The method of claim 1 wherein the one or more thresholds include:

a first threshold corresponding to the first magnetic field exceeding a lower threshold while increasing;

a second threshold corresponding to the first magnetic field exceeding a higher threshold while increasing;

a third threshold corresponding to the second magnetic field exceeding a lower threshold while increasing;

a fourth threshold corresponding to the second magnetic field exceeding a upper threshold while increasing.

11. The method of claim 1 wherein:

the calculating an indication of a first magnetic field applied to the MTJ further includes calculating a first current in the first conductor;

the calculating an indication of a second magnetic field applied to the MTJ further includes calculating a second current in the second conductor.

Assignments (8)
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0704 →
RELEASE OF SECURITY INTEREST Recorded Jul 30, 2010
From: CITIBANK, N.A.
To: EVERSPIN TECHNOLOGIES, INC.
Reel/Frame 024767/0398 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 24, 2009
From: FREESCALE SEMICONDUCTOR, INC.
To: EVERSPIN TECHNOLOGIES, INC.
Reel/Frame 022597/0062 →
SECURITY AGREEMENT Recorded Feb 16, 2008
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 020518/0215 →
SECURITY AGREEMENT Recorded Feb 2, 2007
From: FREESCALE SEMICONDUCTOR, INC.; FREESCALE ACQUISITION CORPORATION; FREESCALE ACQUISITION HOLDINGS CORP.; FREESCALE HOLDINGS (BERMUDA) III, LTD.
To: CITIBANK, N.A. AS COLLATERAL AGENT
Reel/Frame 018855/0129 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2004
From: MOTOROLA, INC
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 015360/0718 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2004
From: NAHAS, JOSEPH J.
To: MOTOROLA, INC.
Reel/Frame 015125/0740 →