IP Library Granted Patent US 7,205,651
Granted Patent B2
US 7,205,651 · App. 10/825,910 · Granted Apr 17, 2007

Thermally enhanced stacked die package and fabrication method

Assignee: ST Assembly Test Services Ltd.
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Quick Facts
Patent No.
US 7,205,651
App. No.
10/825,910
Granted
Apr 17, 2007
Kind
B2
Abstract

A substrate is provided. A first die is attached to the substrate. The first die is electrically connected to the substrate. A heat sink having an undercut around its periphery is attached to the first die. A second die is attached to the heat sink. The second die is electrically connected to the substrate, and the first die, the heat sink, and the second die are encapsulated.

Claims (59)

1. A method of assembling a semiconductor package with stacked dies comprising:

providing a substrate;

attaching a first die to the substrate;

electrically connecting the first die to the substrate;

attaching a heat sink to the first die;

electrically connecting the heat sink to the substrate using a number of bonding wires;

the heat sink comprising a body portion, an undercut portion around a periphery thereof, and a plurality of legs integrally formed with the undercut portion;

attaching the plurality of legs to the substrate;

attaching a second die to the heat sink;

electrically connecting the second die to the substrate; and

encapsulating the first die, the heat sink, and the second die.

2. The method of assembling a semiconductor package with stacked dies as claimed in claim 1 wherein:

electrically connecting the first die to the substrate uses a number of bonding wires; and

attaching a heat sink attaches a heat sink that extends laterally over the number of bonding wires.

3. The method of assembling a semiconductor package with stacked dies as claimed in claim 1 wherein attaching a heat sink attaches a heat sink that is electrically grounded.

4. The method of assembling a semiconductor package with stacked dies as claimed in claim 1 wherein attaching a heat sink attaches a heat sink that has an electrically conductive coating, further comprising:

connecting the second die to the electrically conductive coating; and

connecting the electrically conductive coating to a ground plane.

5. The method of assembling a semiconductor package with stacked dies as claimed in claim 1 wherein attaching a heat sink attaches a heat sink that extends laterally beyond the edges of the second die.

6. A method of thermally enhancing a semiconductor package with a stack of dies comprising providing a heat sink between dies in the stack, the heat sink having bonding wires to a ground connection in a substrate; the heat sink having a body portion, an undercut portion around a periphery thereof, a plurality of legs integrally formed with the undercut portion, and electrically connected using a number of bonding wires to the stack of dies.

7. The method of thermally enhancing a semiconductor package with a stack of dies as claimed in claim 6 wherein:

providing a heat sink attaches a heat sink that extends laterally over the lower die to which the heat sink is attached.

8. The method of thermally enhancing a semiconductor package with a stack of dies as claimed in claim 6 wherein providing a heat sink attaches a heat sink that is electrically grounded.

9. The method of thermally enhancing a semiconductor package with a stack of dies as claimed in claim 6 wherein providing a heat sink attaches a heat sink that has an electrically conductive coating, further comprising:

connecting one of the dies in the stack of dies to the electrically conductive coating; and

connecting the electrically conductive coating to a ground plane.

10. The method of thermally enhancing a semiconductor package with a stack of dies as claimed in claim 6 wherein providing a heat sink attaches a heat sink between each adjoining pair of dies in the stack of dies.

11. A semiconductor package with stacked dies comprising:

a substrate;

a first die attached to the substrate;

the first die being electrically connected to the substrate;

a heat sink attached to the first die;

a number of bonding wires electrically connecting the heat sink to the substrate;

the heat sink having a body portion, an undercut portion around a periphery thereof, and a plurality of legs integrally formed with the undercut portion;

the plurality of legs attached to the substrate;

a second die attached to the heat sink and electrically connected to the substrate; and

an encapsulant over the first die, the heat sink, and the second die.

12. The semiconductor package with stacked dies as claimed in claim 11 further comprising:

a number of bonding wires electrically connecting the first die to the substrate; and wherein:

the undercut of the heat sink extends laterally over the number of bonding wires.

13. The semiconductor package with stacked dies as claimed in claim 11 wherein the heat sink is electrically grounded.

14. The semiconductor package with stacked dies as claimed in claim 11 wherein:

the heat sink has an electrically conductive coating connected to a ground plane on the substrate; and

the second die is connected to the electrically conductive coating.

15. The semiconductor package with stacked dies as claimed in claim 11 wherein the undercut of the heat sink extends laterally beyond the edges of the second die.

16. A thermally enhanced semiconductor package with a stack of dies comprising:

a heat sink between dies in the stack;

the heat sink having a body portion, an undercut portion around a periphery thereof, and a plurality of legs integrally formed with the undercut and a plurality of legs integrally formed with the undercut portion;

a number of bonding wires electrically connecting the heat sink to the dies in the stack;

a substrate having a ground connection; and

a number of bonding wires electrically connecting the heat sink to the ground connection.

17. The thermally enhanced semiconductor package with a stack of dies as claimed in claim 16 wherein:

the undercut of the heat sink extends laterally over the die to which the heat sink is attached.

18. The thermally enhanced semiconductor package with a stack of dies as claimed in claim 16 wherein the heat sink is electrically grounded.

19. The thermally enhanced semiconductor package with a stack of dies as claimed in claim 16 wherein:

the heat sink has an electrically conductive coating;

one of the dies in the stack of dies is connected to the electrically conductive coating; and

the electrically conductive coating is connected to a ground plane.

20. The thermally enhanced semiconductor package with a stack of dies as claimed in claim 16 wherein a heat sink is positioned between each adjoining pair of dies in the stack of dies.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Jun 16, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052950/0497 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0400 →
CHANGE OF NAME Recorded Aug 6, 2015
From: ST ASSEMBLY TEST SERVICES LTD.
To: STATS CHIPPAC LTD.
Reel/Frame 036286/0590 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2004
From: DO, BYUNG TAI; AHN, BYUNG HOON
To: ST ASSEMBLY TEST SERVICES LTD.
Reel/Frame 014814/0135 →
Continuity (1)
Related Publication 20050230800A1 · Oct 20, 2005