IP Library Granted Patent US 7,332,430
Granted Patent B2
US 7,332,430 · App. 10/826,601 · Granted Feb 19, 2008

Method for improving the mechanical properties of BOC module arrangements

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Quick Facts
Patent No.
US 7,332,430
App. No.
10/826,601
Granted
Feb 19, 2008
Kind
B2
Abstract

The invention relates to a method for improving the mechanical properties of BOC module arrangements in which chips have 3D structures, solder balls, μ springs or soft bumps which are mechanically and electrically connected by means of solder connections to terminal contacts on a printed circuit board or leadframe. Advantages are achieved by providing a casting compound for the wafer or the chips after they have been individually separated and before they are mounted on the printed circuit board in such a way that the tips of the 3D structures protrude from this compound. The casting compound preferably has elastic and mechanical properties comparable to those of silicon.

Claims (24)

1. A method of manufacturing a module, the method comprising:

providing a semiconductor wafer that includes a connection area extending over a top surface of the semiconductor wafer, wherein the connection area comprises a compliant 3D structure that includes a conductor overlying a compliant base element, the conductor being integral with a redistribution layer that overlies the semiconductor wafer;

applying a casting compound over the top surface of the semiconductor wafer;

after applying a casting compound, reducing a thickness of the casting compound so that the connection area protrudes through the casting compound;

after applying the casting compound, exposing separation corridors on the semiconductor wafer by removing portions of the casting compound; and

after exposing separation corridors, separating the wafer into a plurality of individual chips.

2. The method of claim 1 , further comprising, after applying the casting compound, mounting the module to a printed circuit board.

3. The method of claim 1 , further comprising, after forming the casting compound, attaching the module to a lead frame.

4. The method of claim 1 , wherein the separation corridors are exposed by a photolithographic process.

5. The method of claim 1 , wherein the separation corridors are exposed with use of a laser beam.

6. The method of claim 1 , wherein the casting compound is cooled before separating the wafer into a plurality of individual chips.

7. The method of claim 1 , wherein the casting compound is applied uniformly by spraying, dispensing or printing.

8. The method of claim 1 , wherein the casting compound has thermal and mechanical properties comparable to those of silicon.

9. The method of claim 8 , wherein the casting compound comprises a silicon-based material.

10. The method of claim 8 , wherein the casting compound comprises a thermoplastic material.

11. The method of claim 8 , wherein the casting compound comprises an epoxy resin.

12. The method of claim 1 , wherein the thickness of the casting compound is reduced by thermal removal.

13. The method of claim 1 , wherein the thickness of the casting compound is reduced by etching.

14. The method of claim 1 , further comprising, after applying a casting compound, electrically coupling the connection area to a terminal of a second apparatus.

15. The method of claim 14 , wherein electrically coupling the connection area comprises soldering the connection area to the terminal.

16. The method of claim 1 , wherein separating the wafer into a plurality of individual chips comprises using a laser to separate the wafer.

17. A method for improving the mechanical properties of a BOC module arrangement in which chips have 3D structures which are mechanically and electrically connected by means of solder connections to terminal contacts on a printed circuit board or leadframe, the method characterized in that a casting compound is applied over a top surface of a semiconductor wafer, and excess thickness of the casting compound is removed, in such a way that tips of the 3D structures protrude from the compound, wherein the 3D structures comprise compliant 3D structures each of which includes a conductor overlying a compliant base element, the conductor being integral with a redistribution layer that overlies the top surface of the semiconductor wafer, and wherein the after the casting compound is applied, exposing separation corridors by removing portions of the casting compound, and wherein after the exposing the separation corridors, separating the semiconductor wafer into chips.

18. The method of claim 17 , wherein the conductor comprises metal.

19. The method of claim 17 , wherein the chips comprise individual semiconductor dies.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2015
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 036873/0758 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2015
From: QIMONDA AG
To: INFINEON TECHNOLOGIES AG
Reel/Frame 035623/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 15, 2010
From: INFINEON TECHNOLOGIES AG
To: QIMONDA AG
Reel/Frame 023796/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 29, 2004
From: BRINTZINGER, AXEL; TROVARELLI, OCTAVIO
To: INFINEON TECHNOLOGIES AG
Reel/Frame 015022/0518 →