IP Library Granted Patent US 7,219,317
Granted Patent B2
US 7,219,317 · App. 10/828,408 · Granted May 15, 2007

Method and computer program for verifying an incremental change to an integrated circuit design

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Quick Facts
Patent No.
US 7,219,317
App. No.
10/828,408
Granted
May 15, 2007
Kind
B2
Abstract

A method and computer program product for verifying an incremental change to an integrated circuit design include receiving as input an integrated circuit design database and an engineering change order. Objects in the integrated circuit design database are identified and marked to indicate a current state of the integrated circuit design database. The engineering change order is applied to the integrated circuit design database, and the integrated circuit design database is analyzed to generate a list of incremental changes to the integrated circuit design database resulting from the engineering change order. Objects in the integrated circuit design database included in the list of incremental changes are identified and marked to distinguish objects in the integrated circuit design database that were changed from the current state. The marked integrated circuit design database distinguishing the objects that were changed from the current state is generated as output.

Claims (88)

1. A method of verifying an incremental change to an integrated circuit design comprising steps of:

(a) receiving as input an integrated circuit design database;

(b) receiving as input an engineering change order;

(c) identifying and marking polygons in a generic data stream file in the integrated circuit design database to indicate a current state of the integrated circuit design database;

(d) applying the engineering change order to the integrated circuit design database;

(e) analyzing the integrated circuit design database to generate a list of incremental changes to the integrated circuit design database, the list of incremental changes including all new polygons added to the integrated circuit design and all polygons deleted from the integrated circuit design by the engineering change order;

(f) adding all cells that have been relocated in the integrated circuit design or that have changed in cell type to the list of incremental changes;

(g) adding all nets that include the cells that were added to the list of incremental changes in step (f) to the list of incremental changes;

(h) identifying and marking polygons in the generic data stream file in the integrated circuit design database included in the list of incremental changes to generate a marked integrated circuit design database that distinguishes polygons in the generic data stream file that were changed from the current state; and

(i) generating as output the marked integrated circuit design database.

2. The method of claim 1 wherein step (i) comprises translating the marked integrated circuit design database to a file in generic data stream format.

3. The method of claim 2 further comprising a step of applying a special rule deck to validate the marked integrated circuit design database wherein the special rule deck includes only design checks and rules applicable to the polygons in the generic data stream file that were changed from the current state.

4. The method of claim 3 further comprising a step of identifying a design rule violation in the polygons in the generic data stream file that were changed from the current state.

5. The method of claim 4 further comprising a step of modifying the marked integrated circuit design database to correct the design rule violation.

6. A computer readable storage medium tangibly embodying instructions for a computer that when executed by the computer implement a method for verifying an incremental change to an integrated circuit design, the method comprising steps of:

(a) receiving as input an integrated circuit design database;

(b) receiving as input an engineering change order;

(c) identifying and marking polygons in a generic data stream file in the integrated circuit design database to indicate a current state of the integrated circuit design database;

(d) applying the engineering change order to the integrated circuit design database;

(e) analyzing the integrated circuit design database to generate a list of incremental changes to the integrated circuit design database, the list of incremental changes including all new polygons added to the integrated circuit design and all polygons deleted from the integrated circuit design by the engineering change order;

(f) adding all cells that have been relocated in the integrated circuit design or that have changed in cell type to the list of incremental changes;

(g) adding all nets that include the cells that were added to the list of incremental changes in step (f) to the list of incremental changes;

(h) identifying and marking polygons in the generic data stream file in the integrated circuit design database included in the list of incremental changes to generate a marked integrated circuit design database that distinguishes polygons in the generic data stream file that were changed from the current state; and

(i) generating as output the marked integrated circuit design database.

7. The computer readable storage medium of claim 6 wherein step (i) comprises translating the marked integrated circuit design database to a file in generic data stream format.

8. The computer readable storage medium of claim 7 further comprising a step of applying a special rule deck to validate the marked integrated circuit design database wherein the special rule deck includes only design checks and rules applicable to the polygons in the generic data stream file that were changed from the current state.

9. The computer readable storage medium of claim 8 further comprising a step of identifying a design rule violation in the polygons in the generic data stream file that were changed from the current state.

10. The computer readable storage medium of claim 9 further comprising a step of modifying the marked integrated circuit design database to correct the design rule violation.

11. A method of verifying an incremental change to an integrated circuit design comprising steps of:

(a) receiving as input an integrated circuit design database;

(b) receiving as input an engineering change order;

(c) identifying and marking polygons in a generic data stream file in the integrated circuit design database to indicate a current state of the integrated circuit design database;

(d) applying the engineering change order to the integrated circuit design database;

(e) analyzing the integrated circuit design database to generate a list of incremental changes to the integrated circuit design database resulting from the engineering change order;

(f) adding all cells that have been relocated in the integrated circuit design or that have changed in cell type to the list of incremental changes;

(g) adding all nets that include the cells that were added to the list of incremental changes in step (f) to the list of incremental changes;

(h) identifying and marking polygons in the generic data stream file in the integrated circuit design database included in the list of incremental changes to generate a marked integrated circuit design database that distinguishes polygons in the generic data stream file that were changed from the current state; and

(i) generating as output the marked integrated circuit design database.

12. The method of claim 11 further comprising a step of applying a special rule deck to validate the marked integrated circuit design database wherein the special rule deck includes only design checks and rules applicable to the polygons in the generic data stream file that were changed from the current state.

13. A computer readable storage medium tangibly embodying instructions for a computer that when executed by the computer implement a method for verifying an incremental change to an integrated circuit design, the method comprising steps of:

(a) receiving as input an integrated circuit design database;

(b) receiving as input an engineering change order;

(c) identifying and marking polygons in a generic data stream file in the integrated circuit design database to indicate a current state of the integrated circuit design database;

(d) applying the engineering change order to the integrated circuit design database;

(e) analyzing the integrated circuit design database to generate a list of incremental changes to the integrated circuit design database resulting from the engineering change order;

(f) adding all cells that have been relocated in the integrated circuit design or that have changed in cell type to the list of incremental changes;

(g) adding all nets that include the cells that were added to the list of incremental changes in step (f) to the list of incremental changes;

(h) identifying and marking polygons in the generic data stream file in the integrated circuit design database included in the list of incremental changes to generate a marked integrated circuit design database that distinguishes polygons in the generic data stream file that were changed from the current state; and

(i) generating as output the marked integrated circuit design database.

14. The computer readable storage medium of claim 13 further comprising a step of applying a special rule deck to validate the marked integrated circuit design database wherein the special rule deck includes only design checks and rules applicable to the polygons in the generic data stream file that were changed from the current state.

15. A method of verifying an incremental change to an integrated circuit design comprising steps of:

(a) receiving as input an integrated circuit design database;

(b) receiving as input an engineering change order;

(c) identifying and marking polygons in a generic data stream file in the integrated circuit design database to indicate a current state of the integrated circuit design database;

(d) applying the engineering change order to the integrated circuit design database;

(e) analyzing the integrated circuit design database to generate a list of incremental changes to the integrated circuit design database resulting from the engineering change order;

(f) adding all cells that have been relocated in the integrated circuit design or that have changed in cell type to the list of incremental changes;

(g) identifying and marking polygons in the generic data stream file in the integrated circuit design database included in the list of incremental changes to generate a marked integrated circuit design database that distinguishes polygons in the generic data stream file that were changed from the current state; and

(h) generating as output the marked integrated circuit design database.

16. The method of claim 15 further comprising a step of applying a special rule deck to validate the marked integrated circuit design database wherein the special rule deck includes only design checks and rules applicable to the polygons in the generic data stream file that were changed from the current state.

17. A computer readable storage medium tangibly embodying instructions for a computer that when executed by the computer implement a method for verifying an incremental change to an integrated circuit design, the method comprising steps of:

(a) receiving as input an integrated circuit design database;

(b) receiving as input an engineering change order;

(c) identifying and marking polygons in a generic data stream file in the integrated circuit design database to indicate a current state of the integrated circuit design database;

(d) applying the engineering change order to the integrated circuit design database;

(e) analyzing the integrated circuit design database to generate a list of incremental changes to the integrated circuit design database resulting from the engineering change order;

(f) adding all cells that have been relocated in the integrated circuit design or that have changed in cell type to the list of incremental changes;

(g) identifying and marking polygons in the generic data stream file in the integrated circuit design database included in the list of incremental changes to generate a marked integrated circuit design database that distinguishes polygons in the generic data stream file that were changed from the current state; and

(h) generating as output the marked integrated circuit design database.

18. The computer program product of claim 17 further comprising a step of applying a special rule deck to validate the marked integrated circuit design database wherein the special rule deck includes only design checks and rules applicable to the polygons in the generic data stream file that were changed from the current state.

19. A method of verifying an incremental change to an integrated circuit design comprising steps of:

(a) receiving as input an integrated circuit design database;

(b) receiving as input an engineering change order;

(c) identifying and marking polygons in a generic data stream file in the integrated circuit design database to indicate a current state of the integrated circuit design database;

(d) applying the engineering change order to the integrated circuit design database;

(e) analyzing the integrated circuit design database to generate a list of incremental changes to the integrated circuit design database resulting from the engineering change order;

(f) identifying and marking polygons in the generic data stream file in the integrated circuit design database included in the list of incremental changes to generate a marked integrated circuit design database that distinguishes polygons in the generic data stream file that were changed from the current state;

(g) generating as output the marked integrated circuit design database including translating the marked integrated circuit design database to a file in generic data stream format; and

(h) applying a special rule deck to validate the marked integrated circuit design database wherein the special rule deck includes only design checks and rules applicable to the polygons in the generic data stream file that were changed from the current state.

20. A computer readable storage medium tangibly embodying instructions for a computer that when executed by the computer implement a method for verifying an incremental change to an integrated circuit design, the method comprising steps of:

(a) receiving as input an integrated circuit design database;

(b) receiving as input an engineering change order;

(c) identifying and marking polygons in a generic data stream file in the integrated circuit design database to indicate a current state of the integrated circuit design database;

(d) applying the engineering change order to the integrated circuit design database;

(e) analyzing the integrated circuit design database to generate a list of incremental changes to the integrated circuit design database resulting from the engineering change order;

(f) identifying and marking polygons in the generic data stream file in the integrated circuit design database included in the list of incremental changes to generate a marked integrated circuit design database that distinguishes polygons in the generic data stream file that were changed from the current state;

(g) generating as output the marked integrated circuit design database including translating the marked integrated circuit design database to a file in generic data stream format; and;

(h) applying a special rule deck to validate the marked integrated circuit design database wherein the special rule deck includes only design checks and rules applicable to the polygons in the generic data stream file that were changed from the current state.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Apr 15, 2022
From: CORTLAND CAPITAL MARKET SERVICES LLC
To: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
Reel/Frame 059720/0223 →
SECURITY INTEREST Recorded Feb 1, 2018
From: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
To: CORTLAND CAPITAL MARKET SERVICES LLC, AS COLLATERAL AGENT
Reel/Frame 045216/0020 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2017
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.; BROADCOM CORPORATION
To: BELL SEMICONDUCTOR, LLC
Reel/Frame 044887/0109 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
CHANGE OF NAME Recorded Jun 6, 2014
From: LSI LOGIC CORPORATION
To: LSI CORPORATION
Reel/Frame 033102/0270 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →